Intel
- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 56 active AI roles, down 27% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Silicon Design Verification Engineer This role focuses on the functional logic verification of integrated SoCs, ensuring they meet specifications. Responsibilities include developing verification plans, test benches, and environments, executing these plans using emulation and simulation, debugging issues, and collaborating with design and architecture teams. The role also involves leveraging post-silicon learnings to improve future products. | — | 0 |
| Connectivity Systems Validation Engineer This role focuses on developing, executing, and automating Bluetooth and Wi-Fi connectivity tests for hardware and software products. It involves creating validation environments, identifying and reporting issues, developing test plans, and collaborating with cross-functional teams. The role requires experience with test automation (Python) and network protocol analyzers, with a mention of integrating Gen AI Agents into validation tasks. | — | 0 |
| Mfg Systems Software Development Engineer |
| — |
| 0 |
| SoC Compute/Memory Subsystem Architect Intel is seeking a Senior SoC Compute & Memory Architect to define and drive the architecture of compute complexes and high-performance memory subsystems for next-generation IPU/DPU platforms. This role involves end-to-end architecture of CPU clusters, cache hierarchies, coherency models, and memory subsystems, optimizing for performance, scalability, power efficiency, and programmability in hyperscale environments. Responsibilities include cache hierarchy and coherency, memory subsystem, IO memory and virtualization, system-level integration, power efficiency, and defining a multi-generation architecture roadmap. The role requires collaboration with various teams and strong leadership skills. | — | 0 |
| Senior SoC Architect Senior SoC Architect role at Intel focusing on defining and driving architecture specifications for Unified Intel Chassis (UIC) IP components and subsystems. Responsibilities include platform-level performance analysis, building performance environments, and ensuring architecture is power-optimized, scalable, and practical for implementation. Requires experience in SoC IP architecture, writing specifications, and power optimization techniques. | — | 0 |
| Senior Thin Films Engineer Senior Engineer role focused on process innovation and optimization for thin film deposition in advanced semiconductor manufacturing, bridging technology development and high-volume production for Intel's foundry customers. | — | 0 |
| Senior Design Verification Engineer Senior Design Verification Engineer for Intel's Silicon Chassis team, responsible for end-to-end verification of chassis and interconnect IP blocks. Requires expertise in DV methodologies, protocol verification, memory subsystems, and collaboration with cross-functional teams. The role involves driving quality, testbench architecture, and coverage closure, with an emphasis on adopting emerging methodologies like ML-driven verification flows and AI-assisted development tools. | — | 0 |
| Semiconductor Facilities Technician This role is for a Facilities Chemical/Gas Technician at Intel's semiconductor manufacturing facility in Rio Rancho, New Mexico. The technician will provide operational support, perform preventive maintenance, and troubleshoot Vacuum Pump and Abatement Systems. Responsibilities include managing code compliance, assisting in developing procedures, and completing certification packages. The role requires adaptability, strong judgment, leadership, collaboration, continuous learning, safety consciousness, problem-solving, and communication skills. Candidates must be willing to work a specific night shift schedule and handle physically demanding tasks including wearing breathing protection and chemical suits. Minimum qualifications include a BS in STEM or an associate degree in STEM with 2+ years of relevant experience, or a High School Diploma/GED with 2.5+ years of related hands-on manufacturing or military experience. Preferred qualifications include 3+ years of experience in preventive maintenance programs and equipment repair processes. | — | 0 |
| Senior Customer Technical Enablement and Debug Engineer This role is for a Senior Customer Technical Enablement and Debug Engineer at Intel, focusing on system-level debug (HW/FW/SW) for networking IPU deployments. The engineer will be the primary technical point of contact for customers, diagnosing and resolving complex issues in real-world environments, and collaborating with internal teams to drive resolutions. The role also involves customer enablement and improving debug methodologies. | — | 0 |
| Quality Operations Manager (QOM) Seeking a Quality Operations Manager to support the VP and GM of Foundry Quality, Reliability, and Labs at Intel Foundry. This role focuses on driving organizational alignment, operational rigor, and execution of key business priorities within a global and technically complex organization. Responsibilities include strategic planning, operational excellence, cross-functional leadership, transformation initiatives, and stakeholder engagement. Requires experience in semiconductor manufacturing, quality systems, or reliability engineering, with a strong background in strategy, operations, and program leadership. | — | 0 |
| Senior EDA Tools Software Engineer Senior EDA Tools Software Engineer to define and lead development of a chassis automation tool. This tool will translate user requirements into chassis parameters, topology, and generate RTL, register definitions, and verification collateral. The role involves working with architecture, RTL design, verification, and SOC integration teams, mentoring junior engineers, and enabling PPA optimization loops. AI-assisted workflows are mentioned as part of daily development. | — | 0 |
| Senior Analog IP Integration, Power, and SI Engineer Senior Analog IP Integration, Power, and SI Engineer at Intel, focusing on designing and optimizing analog and mixed-signal IP for various Intel customers. Responsibilities include circuit design, layout, simulation, technical leadership, and collaboration with cross-functional teams. Requires expertise in analog circuit design, high-speed IO, and experience with industry-standard tools and process technologies. | — | 0 |
| Network Platform Architect Intel is seeking a Network Platform Architect to define, build, and secure the company's network strategy. This role involves driving architectural reviews, solving complex network challenges, and delivering secure and efficient infrastructure. Responsibilities include defining platform integration and adapter architecture end-to-end for networking products, collaborating with partners and customers on connectivity, manageability, cooling, and form factor. The role will also define next-generation products, focusing on the intersection of SoC architecture, board design, platform firmware/software, and OEM/ODM integration. Key areas include IPU/DPU/NIC Card/Adapter Architecture Ownership, Platform Manageability Interconnect and Serviceability Architecture, and Platform Thermal, Power, and Reliability Requirements. The architect will serve as the platform architecture voice, lead technical alignment across cross-functional teams, and partner with leadership to define platform milestones. | — | 0 |
| Analog Design Engineering Manager Leads technical teams to deliver industry-defining analog and mixed-signal IP for Intel's Client, Datacenter, AI and Foundry customers. Manages analog design engineers, guides silicon design, and oversees post-silicon validation. | — | 0 |
| Device Engineer Device Engineer role focused on advanced FinFETs technology, working on yield ramp-up, process and device optimization in a high-volume manufacturing Fab. Responsibilities include driving product roadmaps, executing yield roadmaps, developing new device technology, root cause analysis of yield/performance issues, NPI, and modeling device performance. | — | 0 |
| Intel Foundry Advanced Device Development Engineer Develops and optimizes semiconductor manufacturing processes for advanced transistor technology, involving experiment design, data analysis, and collaboration with various engineering teams. Requires expertise in semiconductor materials, fabrication, and device physics. | — | 0 |
| Graduate Talent (RF Test Product Development Engineer) This role is for a Graduate Talent (RF Test Product Development Engineer) at Intel in Malaysia. The responsibilities include ensuring the testability and manufacturability of integrated circuits, developing test methods and hardware solutions, and analyzing component specifications and customer returns to optimize production quality and cost. Qualifications include a Master/Bachelor Degree in Electronics, Electrical, Microelectronics or Computer Engineering, programming skills in C++ or Java, and understanding of RF technology, WiFi, BT, RF test methods, RF instruments, and Automated Test Equipment (ATE). High volume manufacturing experience with RF testing is also required. | — | 0 |
| APTD Manufacturing Technician - Night shift Manufacturing Technician for Intel's Advanced Packaging Technology Development team, focusing on substrate and wafer assembly. Responsibilities include operating and maintaining production equipment, performing preventive maintenance, troubleshooting issues, supporting process improvements, and ensuring quality standards. The role involves data collection, process optimization, and training. | — | 0 |
| Tool Install Project Manager Project Manager for Tool Installation in semiconductor manufacturing factories, managing teams, suppliers, schedules, and budgets to ensure safe and quality delivery of projects. | — | 0 |
| Senior CPU RTL Design Engineer Senior CPU RTL Design Engineer responsible for logic design, RTL coding, and simulation for CPU IP blocks. The role involves defining architecture and microarchitecture features, optimizing logic for power, performance, and area, and providing technical leadership to the design team. Experience with Timing Closure, Power Convergence, and OOO execution is required. | — | 0 |
| SoC Integration Engineer Seeking an experienced SoC Integration Engineer to join the Unified Intel Chassis (UIC) team. This role involves working on high-performance Network-on-Chip (NoC) platform solutions, integrating IP blocks into SoC platforms, and collaborating with architecture, IP, and physical design teams to meet power, performance, and area (PPA) targets. The position requires a Bachelor's degree in Electrical Engineering or related field with 6+ years of experience or a Master's degree with 4+ years of experience, specifically in SoC and/or IP design. | — | 0 |
| Senior SoC Power Management Architect This role focuses on defining and developing cutting-edge System-on-Chip (SoC) architectures with emphasis on power management, performance optimization, and energy efficiency for next-generation computing platforms. The Senior SoC Power Management Architect will collaborate across architecture, design, validation, and product teams to deliver scalable solutions from concept through high-volume manufacturing (HVM). Responsibilities include defining and developing SoC power management architecture, maintaining a system-level perspective, evaluating design trade-offs, driving power integration strategies, partnering with hardware and software teams, supporting the full product lifecycle, and analyzing post-silicon power/performance data. | — | 0 |
| Ocotillo Technology Fabrication Process Integration and Yield Engineer Process Integration and Yield Engineer at Intel responsible for analyzing data, identifying root causes of defects and yield issues, and leading continuous improvement projects in semiconductor fabrication. Requires strong statistical analysis and problem-solving skills. | — | 0 |
| OTF Failure Analysis Technician - Night Shift This role is for an OTF Failure Analysis Technician in a semiconductor lab, responsible for operating lab instruments and handling silicon wafers for advanced technology nodes. The job involves sample preparation, operating tools like FIB/PFIB/SEM for cross-sectioning and material analysis, and working from schematics. It requires experience in semiconductor manufacturing or failure analysis tools and emphasizes attention to detail and adaptability in a fast-paced environment. | — | 0 |
| Manufacturing Technician Manufacturing Technician role at Intel Ireland focused on supporting wafer manufacturing operations in a high-volume semiconductor environment. Responsibilities include equipment maintenance, troubleshooting, operational support, and ensuring safety, quality, and output targets are met. Requires a technical qualification and significant experience in manufacturing and maintenance within a regulated environment. | — | 0 |
| Senior Silicon Photonics TD Reliability Engineer Senior Silicon Photonics TD Reliability Engineer at Intel, focusing on the reliability of silicon photonics technology and devices. Responsibilities include assessing reliability, optimizing processes, conducting experiments, developing new characterization techniques, and collaborating with cross-functional teams to ensure quality and reliability throughout the development lifecycle. The role involves root cause analysis of failures and ensuring smooth transitions from development to high-volume manufacturing. | — | 0 |
| Construction Engineering Intern Construction Engineering Intern role at Intel, supporting the execution and delivery of semiconductor manufacturing facility projects. Responsibilities include supporting databases, field validation, software testing, design development, and managing engineering content. Requires a Bachelor's degree in a relevant engineering field and strong attention to detail. | — | 0 |
| Senior Technologist, Hybrid Bonding Module Senior Technologist for Die-to-Wafer Hybrid Bonding (HBI) at Intel, focusing on process and equipment development for advanced packaging. The role involves driving improvements in yield, reliability, and defectivity for next-generation hybrid bonding technologies, supporting both development and high-volume manufacturing environments. Requires deep technical expertise in hybrid bonding process or equipment engineering. | — | 0 |
| Software Application Development Engineer Software Application Development Engineer at Intel, focusing on developing, testing, and maintaining software applications. The role involves both frontend and backend development, secure coding practices, and collaboration with product security engineers. It requires proficiency in programming languages like C#, SQL, TypeScript, Angular, JavaScript, and knowledge of RDBMS and Agile methodologies. Experience with DevOps, CI/CD, and cloud platforms is preferred. | — | 0 |
| Senior Design Verification Engineer Senior Design Verification Engineer for Intel's Silicon Chassis team, responsible for owning verification of interconnect and chassis IP blocks. Requires expertise in verification planning, environment development, collaboration with cross-functional teams, and debugging. Experience with AI-assisted development tools is mentioned as part of the daily workflow. | — | 0 |
| IP Development Engineer Intel is seeking an IP Development Engineer with a Master's Degree in Electronics/VLSI/Computer Engineering. The role involves translating digital design concepts into RTL using System Verilog, developing microarchitectural specifications, coding RTL, running design tools, creating timing collateral, and supporting IP usage. Experience with functional bus protocols and JTAG is beneficial. Interest in automation using PERL/Python is a plus. | — | 0 |
| Collateral Design and DFM Engineer Intel is seeking a Collateral Design and DFM Lead Engineer to join their Manufacturing Development and Customer Engineering (MDCE) organization. This role focuses on advancing technology nodes from qualification to high-yield production, developing new technologies on mature node infrastructure, and enhancing Design for Manufacturability (DFM) methodologies for improved performance, yield, and ramp-up across diverse product portfolios. The engineer will lead cross-functional teams to define and enhance DFM rules, refine yield tools and flows, and predict and develop rules to avoid design marginalities. | — | 0 |
| NMSi- F11x Dry Etch Module Group Leader Leads a team of module engineers and/or manufacturing operations engineers in the Dry Etch department to support high volume manufacturing, transfer new products, and drive technology development. Focuses on safety, quality, output, and cost, while improving team productivity and efficiency. Requires experience in wafer fabrication engineering, leadership, technical problem-solving, and coaching. | — | 0 |
| Advanced Packaging Technology Development Substrates Module Engineer On-Shift (Nightshift) Module Engineer On Shift (MEOS) provides real-time factory support for equipment, process, and product issues to ensure 24/7 manufacturing operations. Responsibilities include lot movement, responding to process excursions, recovering from equipment errors, lot disposition, new tool enablement, and operational activities. The role requires strong problem-solving, communication, and adaptability in a fast-paced manufacturing environment. Minimum qualifications include a Bachelor's degree in a related engineering or science field with 1+ years of experience, or a Master's degree with 0 years of experience, along with proficiency in statistical data analysis and quality systems. Preferred qualifications include experience with DOE, SPC, semiconductor manufacturing, and metrology tools. | — | 0 |
| Director, SoC Design Engineering Director of SoC Design Engineering responsible for leading functional verification efforts for cutting-edge system-on-chip (SoC) designs, defining and implementing scalable verification methodologies to ensure first-pass silicon success. The role involves architecting verification strategies, developing test benches, leading integration of IPs, and mentoring engineers. | — | 0 |
| APTD_SWA S5 Manufacturing Technician Manufacturing Technician for Intel's Advanced Packaging Technology Development: Substrate and Wafer Assembly (APTDSWA) organization. Responsibilities include collecting and evaluating operating data, making online adjustments to equipment, performing preventive maintenance, troubleshooting issues, supporting production operations, leading improvement processes, and resolving nonstandard events. The role also involves managing training, updating manuals, and participating in safety forums and the Emergency Response Team. Requires adaptability, judgment, and ability to work with general instructions or detailed guidance. | — | 0 |
| Thermal data Analysis Engineer The Thermal Data Analysis Engineer role at Intel focuses on driving thermal design and analysis for GPU and AI accelerators. This involves simulation, experimental work, and cross-functional collaboration to ensure thermal requirements are met for high-performance computing solutions. The role requires expertise in thermal simulation tools, laboratory testing, and applying heat transfer principles to advanced cooling technologies. | — | 0 |
| Design Automation Engineer (TFM/EDA) This role is for a Design Automation Engineer focused on supporting EDA tools and Intel's PDK for external Foundry customers. Responsibilities include installation, maintenance, and technical support of design and compute environments, as well as creating automation scripts to streamline design processes. The role requires experience with front-end and back-end design tools, flows, and methodologies, along with scripting skills in languages like Tcl, Perl, and Python. | — | 0 |
| Silicon Photonics Foundry PDK Design Engineer Seeking a Silicon Photonics (SiP) PDK Design Engineer to join Intel's SPDM team. Responsibilities include creating and documenting pcell designs, design rules, and EDA tool flow automation. The role involves architecting, developing, and validating software solutions for Electronic-Photonic design automation, engaging with partners, and ensuring efficient cloud computing infrastructure. The candidate will lead the development of Design Environment and CI/CD pipelines for hardware and software products. | — | 0 |
| Intel Foundry Strategic Planning Demand Analyst This role is responsible for demand planning and forecasting within Intel Foundry's strategic planning team. It involves collecting, analyzing, and reporting demand data, identifying trends, developing strategies to meet demand, and managing the long-range strategic business plan. The analyst will also run demand solves for mid-term and long-term requirement scenarios, integrating various signals and staying updated on industry trends. | — | 0 |
| APTM NPI Integrator This role focuses on the introduction and transfer of new products and processes within a semiconductor factory environment. The Integrator will coordinate logistics, manage documentation, track progress through the manufacturing flow, and ensure products meet certification requirements before high-volume manufacturing. It involves understanding product lifecycles, fab processing, and post-fab activities, with a strong emphasis on project coordination and issue resolution within the manufacturing process. | — | 0 |
| Yield Development Engineer Yield Development Engineer role focused on semiconductor process development, identifying root cause yield limiters, and driving improvements in manufacturing processes and product reliability. Responsibilities include performing various spectroscopy analyses, providing customer support, assisting with instrument maintenance, and analyzing complex data. Requires a PhD in a STEM field with experience in UHV-based analytical equipment. | — | 0 |
| Ocotillo Technology Fabrication Production Manufacturing Engineer Production Manufacturing Engineer at Intel, focusing on optimizing semiconductor fabrication processes, capacity planning, and factory performance. This role involves driving improvements in cycle time, WIP velocity, output, and quality through data analysis and continuous improvement methodologies in a high-volume manufacturing environment. | — | 0 |
| PM Validation - student position Student position in Front End Validation Team at Intel, focusing on validating Intel CORE's Power Management flows and key interfaces. The role involves planning and implementing validation strategies, defining and writing test environments for RTL implementation, debugging, and driving features to tape-in quality. Requires a BSc student in Electrical or Computer Engineering with 3-4 semesters until graduation. Basic usage of GenAI tools is a plus. | — | 0 |
| Experienced Security Software development Engineer Experienced Security Software Development Engineer at Intel to validate TDX (Trusted Domain Extensions), a confidential computing technology. The role involves validating across firmware, OS, drivers, middleware, SDKs, and applications, building frameworks, automation, and reference implementations. Requires 5+ years of experience in software/hardware validation or verification and coding in C, C++, or Java. | — | 0 |
| RF Hardware Design Engineer Designs and develops RF hardware systems for WiFi and Bluetooth technologies, involving simulation, board-level design, and lab validation. The role also includes an interest in leveraging AI-based solutions to enhance engineering productivity. | — | 0 |
| DFT Automation and Validation Engineer This role focuses on developing and maintaining validation testing environments and tooling for CPU core DFT (Design for Test) validation. Key responsibilities include automation, scripting, debug tools, and improving team AI skills to support validation engineers. The role requires strong programming skills in TCL, Python, and/or Perl, and experience in pre-silicon validation or CAD/tool automation. | — | 0 |
| Graduate Talent (Analog Design Engineer) This role supports memory PHY development in areas like package layout, electrical modeling, and signal/power integrity simulation. Qualifications include a basic understanding of IC design, package/platform architectures, and signal/power integrity, with exposure to layout or validation tools being a plus. | — | 0 |
| Graduate Talent (System and Hardware Enabling Engineer) This role provides technical support for Intel products and technologies, focusing on solution design, enabling partners, and supporting product development and validation. The engineer will create technical collateral, collaborate with internal and external teams, and assist customers with product ramp and issue resolution. | — | 0 |
| Manufacturing Operator (Contract) This role involves performing product manufacturing and assembly tasks, operating and maintaining production equipment, collecting operating data, and driving process improvements in a manufacturing environment. It requires adherence to SOPs and quality standards, with potential for contract extension or conversion to permanent. | — | 0 |