Intel
Building- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 64 active AI roles, up 216% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Hiring
64 / 66
Momentum (4w)
↑+356 +216%
521 opens last 4w · 165 prior 4w
Salary range · avg $253k
$122k–$414k
USD · disclosed roles only
Tracked since
Feb 3
last role today
Hiring velocityscroll left for older weeks
Jobs (734)
| Title | Stage | AI score |
|---|---|---|
| Wi-Fi System Architect Seeking an experienced System Architect to define and develop wireless communication system architectures, focusing on HW/SW partitioning, VLSI hardware architecture, and real-time SW/firmware development for next-generation Wi-Fi technology. | — | 0 |
| Silicon SoC Architect Intel is seeking a Silicon SoC Architect with 15+ years of experience to define and drive end-to-end SoC architecture for high-performance and low-power products. Responsibilities include defining architecture, evaluating trade-offs, conceptualizing microarchitecture, integrating IP blocks, developing test infrastructure, conducting simulations, and collaborating with cross-functional teams. Requires expertise in SoC architecture fundamentals, microarchitecture, RTL development, and system architecture integration, with a strong understanding of performance and power trade-offs. | — | 0 |
| Assembly Equipment Group Department Manager Leads the Assembly & Finish Equipment organization at Vietnam Assembly Test (VNAT), driving improvements in quality, predictability, velocity, and affordability. Focuses on operational excellence, engineering rigor, and innovation through AI/ML and advanced engineering solutions. Owns end-to-end equipment performance for Assembly and Finish, ensuring readiness for High Volume Manufacturing (HVM) and New Product Introduction (NPI). Leverages AI/ML and automation to improve tool availability and reduce repeat issues. Builds a strong team culture and serves as the equipment leader interface to factory and site leadership. | — | 0 |
| IP Design Verification Engineer Seeking an IP Design Verification Engineer to ensure the functionality and performance of Intel's cutting-edge intellectual property (IP) designs for system-on-chip (SoC) applications, focusing on LPDDR5 and DDR5 PHY verification. Responsibilities include developing test benches, defining verification strategies, implementing test cases, debugging failures, and automating pre-silicon validation flows. | — | 0 |
| Firmware Validation Engineer Firmware Validation Engineer responsible for designing, developing, and executing software validation environments and plans to test firmware functionality. This role involves analyzing results, debugging failures, identifying root causes, and collaborating with cross-functional teams to ensure firmware quality and reliability for Intel's technology products. Requires Python scripting and strong debugging skills. | — | 0 |
| Product Development Engineer Develop and optimize testability and manufacturability for cutting-edge integrated circuits, from early feasibility to high-volume production. Evaluate and debug new designs on ATE platforms, characterize devices, define specifications, and perform yield analysis to ensure seamless post-silicon ramp and product launch. | — | 0 |
| Pre-Silicon Validation Engineer This role is for a Pre-Silicon Validation Engineer at Intel in Bangalore, India. The engineer will apply technical skills to execute and support projects, analyze and resolve issues, and collaborate with cross-functional teams. The role requires a Bachelor's degree in a technical field and strong technical aptitude. | — | 0 |
| Assembly Equipment Specialist This role focuses on troubleshooting, repairing, and maintaining manufacturing equipment, performing calibration and preventative maintenance, and analyzing data to improve tool performance. It involves creating reports, updating specifications, and supporting engineering experiments and data collection. | — | 0 |
| Manufacturing Technician ( 1 year contract) Manufacturing Technician role focused on wafer production operations, equipment, process, and training. Responsibilities include data collection, process optimization, preventive maintenance, troubleshooting, and improvement processes within a semiconductor manufacturing environment. | — | 0 |
| Test Equipment Specialist This role involves performing troubleshooting, conversion, and preventive maintenance on test equipment and collaterals in an assembly and test plant. The specialist will monitor and analyze equipment performance, escalate issues, and collaborate with engineering on experiments and upgrades. A technical degree in a related field is required. | — | 0 |
| Systems and Solutions Engineer Systems and Solutions Engineer responsible for the design, development, and integration of systems including software, firmware, board, and silicon/SoC components, focusing on customer requirements and system lifecycle. The role involves systems architecture, component-level analysis, defining implementation solutions, delivering end-to-end technical solutions, and collaborating on next-generation requirements and proof-of-concept innovations. Requires strong experience with Bluetooth protocols and Windows platforms, along with bug triage and customer collaboration skills. | — | 0 |
| Compiler Engineer Compiler Engineer role focused on developing, testing, and maintaining C/C++/DPC++ and Fortran compilers for Intel's CPU and GPU platforms. Responsibilities include feature development, defect resolution, performance optimization, and experimental testing. Collaboration with hardware design teams and open-source communities is expected. | — | 0 |
| Site Operations Specialist This role is for a Site Operations Specialist at Intel, focusing on managing facilities, contractors, and operational budgets to ensure the seamless functioning of Intel's sites. The role involves overseeing maintenance, incident response, supplier management, and project execution within the Real Estate and Workplace Services (REWS) team. While the company mentions "AI everywhere" and "AI-assisted coding tools", the core responsibilities are in facilities and operations management, not AI/ML development. | — | 0 |
| Thermal Analysis Engineer This role focuses on the thermal analysis and design of GPU and AI accelerators, ensuring high-performance computing products meet thermal requirements. It involves simulation, experimental validation, and cross-functional collaboration with silicon, packaging, and platform teams. | — | 0 |
| APTD Substrate Quality Engineer The role focuses on elevating quality standards in a semiconductor factory (CH8) by leading a Process Control System (PCS) Working Group, educating engineers on PCS, driving continuous improvement, and developing a long-term PCS strategy. It requires a strong background in advanced statistical methods and manufacturing experience. | — | 0 |
| Formal Verification Student Student role focused on developing tools and methodologies for formal verification of future CPU products within Intel's Core HW Design Verification Team. Requires familiarity with Python and Linux. | — | 0 |
| Design Verification Engineering Intern This is an internship role for ASIC Design & Verification Engineering, focusing on next-generation System-on-Chip (SoC) technologies. The intern will work with industry-leading EDA tools and methodologies, contributing to high-impact projects in semiconductor design. Responsibilities include debugging, problem-solving, and teamwork. Qualifications include a strong foundation in digital design verification (System Verilog, VHDL), object-oriented programming, and scripting languages. | — | 0 |
| TD Media and Collaterals Development Engineer Develops and optimizes media and collaterals for Intel's assembly packaging platform technologies, applying statistical principles and experimental design to improve manufacturing efficiency, quality, and reliability. This role involves developing evaluation equipment, new techniques for problem identification, and consulting on design and process improvements. | — | 0 |
| Power Integrity Industry Immersion Intern Internship role focused on power integrity challenges in client platform development, requiring electrical engineering fundamentals and experience with simulation tools. | — | 0 |
| Soc Functional Validation Engineer This role focuses on the functional validation of integrated SoCs, ensuring IP integration, interaction between IPs, and system-level features meet performance, power, and area goals. The engineer will develop and execute validation plans, perform silicon debug, and collaborate with various teams throughout the product life cycle to ensure silicon readiness. The role involves testing interactions between SoC features, developing validation infrastructure, and publishing validation reports. | — | 0 |
| Infrastructure Engineer – Compute and Client Infrastructure Engineer focused on server hardware management, lifecycle, and operating systems (Linux/Windows) in a data center environment. Responsibilities include deployment, configuration, troubleshooting, firmware/driver maintenance, OS patching, performance monitoring, and documentation. Requires strong analytical and troubleshooting skills, proactive issue resolution, and excellent documentation. | — | 0 |
| Design Technology Tool Enablement Engineer The Design Technology Platform team is looking for an EDA Tools Software Engineer to design, develop, test, and debug software tools and flows for process design and manufacturing. This role involves collaborating with process developers and EDA vendors, automating workflows, and ensuring seamless integration with design methodologies. The position requires expertise in scripting languages, EDA tools, and semiconductor device physics. | — | 0 |
| Construction Technology Integration Program Manager Program Manager for Construction Technology Integration at Intel Foundry, focusing on integrating new technologies to improve cost, schedule, and productivity in semiconductor factory construction, with a specific emphasis on Off-Site Manufacturing (OSM). | — | 0 |
| HR Manager - Foundry Enabling HR Manager role supporting Foundry Enabling business groups at Intel, focusing on strategic HR initiatives, leadership development, talent management, organizational development, employee relations, and team leadership. Requires a Bachelor's or Master's degree with significant HR experience, preferably in manufacturing or semiconductor environments. | — | 0 |
| Revenue Operations Analyst This role focuses on revenue operations, data management, and business analytics within Intel's Data Center Group. The analyst will maintain customer and product data governance, develop revenue reports and dashboards, analyze trends, and support forecasting. They will also manage the Customer Watch process, collaborate with regional teams, and drive process improvements for data workflows and reporting automation. The role requires strong analytical, communication, and project management skills, with experience in FP&A, sales operations, or finance. | — | 0 |
| IT Support Specialist This role supports enterprise digital signage systems, focusing on operational support, monitoring, hardware health, procurement, and coordinating repair efforts. It also involves evaluating and piloting new technologies and solutions through POCs. | — | 0 |
| Substrate Packaging Defect Metro Tool Owner This role is for a Defect Metrology Engineer in semiconductor manufacturing, focusing on substrate packaging technologies. The engineer will use defect inspection tools to detect and resolve process issues, collaborate with teams to improve yield, manage next-generation tool installations, develop equipment roadmaps, and work with suppliers. The role requires a degree in a relevant engineering or science field with significant experience in semiconductor manufacturing and defect metrology tool ownership. | — | 0 |
| Technical Sales Graduate Intern This is a technical sales graduate intern position at Intel, focusing on providing product expertise, assisting in solution design, and engaging with customers to address technical requirements. The role involves collaboration with sales and engineering teams to develop demonstrations and promote Intel technologies. Cloud domain knowledge, particularly in Big Data and AI, is a plus. | — | 0 |
| Sr. Substrates Development and Ramp Engineer Supports management/senior leadership to incorporate process and quality improvements in Intel's substrates strategy. Defines material inspection methodology, conducts studies related to cost control, process control, and production yield, and implements plans and programs to optimize supply chain. Supports product long range plan development by defining next generation methodology capabilities to support Intel's supply chain roadmap. Explores and benchmarks emerging technology in the industry. Contributes to Intel's future technology definition and requirements. Highlights gaps between roadmap strategy, manufacturing capability, and market demands and recommends solutions to addresses those gaps. Tracks supply demand trends, conducts root cause analysis to find opportunities for process and quality improvements, and collaborates with supply chain leads to implement solutions. Leads supplier selections for new business in partnership with commodity managers and technical/quality partners and drives product and purchase specification content to ensure commodity performance compliance. Performs alternate sourcing risk mitigation for single sourced commodities. Establishes control standards, determines KPIs, monitors performance against targets, and drives root cause analysis for supply chain issues to arrive at solutions. Drives supplier process window validation activities on critical process modules through all stages of development. Drives supplier improvements on quality, reliability, yield, and cost. Maintains quality standards and systems, creating relevant specifications to minimize variability and subjectivity to align with operational capability requirements. Leads quality excursion management and drives failure mode analysis with suppliers. | — | 0 |
| IT Support Specialist IT Support Specialist (L4) providing advanced operational and technical support for Microsoft Teams, Teams Rooms (MTR), Audio/Visual (AV), and Telephony services in a global, 24x7 enterprise environment. Responsibilities include ensuring high availability, performance, and user experience across meeting rooms, conferencing services, and voice systems. The role acts as an escalation point for complex incidents, leads problem management, and proactively maintains service health. This includes readiness validation for conference rooms, lifecycle management of MTR systems, voice infrastructure operations, and live meeting support. | — | 0 |
| IT Support Specialist IT Support Specialist serving as a technical team lead and subject matter expert for Microsoft Teams, Teams Rooms (MTR), Audio/Visual, and Telephony services. Provides Level 4 operational and escalation support in a global 24x7 environment, leading shift operations, coordinating major incidents, and ensuring service quality and SLA adherence. Acts as the primary escalation point for complex issues, mentors support specialists, and partners with engineering, network, and security teams for service stability and continuous improvement. Supports business-critical meetings and enterprise collaboration services with a focus on proactive issue prevention and operational excellence. | — | 0 |
| Security Software Development Engineer Security Software Validation Engineer at Intel, focusing on validating complex software-hardware security innovations for Intel CPUs using Pre-Silicon simulations and identifying/mitigating security risks. Requires strong C++/C programming and software development experience. | — | 0 |
| Power and Performance Lab Engineering Student Student role focused on power and performance post-silicon validation of Intel's client CPU products. Responsibilities include system setup, calibration, and execution of power/performance studies in a lab environment. | — | 0 |
| Systems and Hardware Enabling Engineer This role provides technical support for Intel products and technologies, focusing on solution design, development, validation, and market readiness. It involves creating technical collateral, enabling partners, and collaborating with customer R&D and manufacturing to ensure smooth product integration and ramp-up. The role requires strong C programming and UEFI/BIOS firmware development experience. | — | 0 |
| Systems and Hardware Enabling Engineer The role involves designing, developing, and maintaining firmware solutions that interface directly with hardware, including microcode, FPGA, and IP-specific firmware, for Intel's next-generation client platforms. This includes implementing abstractions of low-level hardware details and ensuring seamless integration between hardware and software layers. | — | 0 |
| SoC Physical Design Engineer Physical Design Engineer at Intel responsible for the end-to-end physical design implementation of next-generation Client SoCs, from RTL to GDS. This includes synthesis, floor planning, placement, routing, clock tree synthesis, power analysis, verification, and signoff. The role also involves performance optimization, developing and improving physical design methodologies, and automating design flows. | — | 0 |
| Packaging Module Development Engineer Develops and validates board assembly process solutions for Intel's integrated circuit (IC) packages and sockets, focusing on Surface Mount Technology (SMT) processes. Responsibilities include designing and optimizing SMT processes, testing prototype boards, analyzing process data, and documenting procedures. | — | 0 |
| DFT Lead (Scan/ATPG) Engineer DFT Lead (Scan/ATPG) Engineer at Intel, responsible for driving DFT implementation for CPU designs in the latest process technology. Requires Master's or Bachelor's degree with significant experience in DFT, ATPG, fault models, memory BIST, IJTAG/TAP, RTL generation, verification, and post-silicon support. | — | 0 |
| Principal Engineer, SoC Design Verification Principal Engineer in SoC Design Verification at Intel, responsible for leading functional logic verification of integrated SoC designs, defining and developing verification plans, test benches, and environments, executing verification plans using emulation and system simulation, debugging presilicon issues, and collaborating with cross-functional teams. The role also involves mentoring technical leaders and ensuring security coverage. | — | 0 |
| EV Lab Student Student role in Intel's Validation Engineering lab, assisting with engineering trials, testing, and maintenance of complex systems using test equipment, computers, and automation robots. Requires current Electrical/Computer Engineering studies and ability to work on-site. | — | 0 |
| Clocking / Physical Design Engineer This role is for a Clocking / Physical Design Engineer at Intel, focusing on the physical design implementation of CPU cores, including synthesis, place and route, floorplanning, clock tree synthesis, static timing analysis, and verification. The role requires a Bachelor's or Master's degree in a relevant STEM field with experience in backend design, scripting languages, and high-frequency clock distribution. | — | 0 |
| Senior Clock Architecture & Design Engineer Senior Clock Architecture & Design Engineer role focused on developing clocking architecture for next-generation CPUs, involving the design of clock distribution networks, custom circuits, and optimization of clock tree synthesis flows. Requires experience in physical design, CTS, static timing analysis, and custom circuits. | — | 0 |
| Quality Program Engineer – Semiconductor This role is for a Quality Program Engineer in semiconductor manufacturing, focusing on ensuring quality, reliability, and audit readiness. Responsibilities include owning the internal audit program, facilitating quality meetings, driving root cause analysis and corrective actions, and analyzing yield/quality metrics to lead improvement initiatives. The role requires experience in semiconductor manufacturing, quality management systems, and leading quality programs with cross-functional teams. | — | 0 |
| Senior Yield Engineer – Substrate & Advanced Packaging Senior Yield Engineer at Intel focusing on semiconductor manufacturing, specifically substrate and advanced packaging. The role involves leading process development, performing advanced statistical analysis and data visualization, developing methods to analyze big data for yield modeling and defect understanding, and collaborating cross-functionally to resolve yield issues. It requires expertise in engineering analysis tools, data analysis techniques, scripting languages (Python), manufacturing process flows, and large-scale data analytics (JMP, SQL, Python). | — | 0 |
| Principal Analog Circuit Design Engineer - SerDes Principal Analog Circuit Design Engineer with expertise in high-speed SerDes applications, focusing on design, development, and verification of analog circuits in advanced process nodes. The role involves floorplanning, circuit design, parameter extraction, simulation, test plan creation, and optimization for power, performance, area, timing, and yield. Requires strong foundational knowledge of analog design principles and hands-on experience with advanced FinFET CMOS processes and simulation tools. The principal engineer is expected to influence technical direction, mentor junior engineers, and drive technical strategy. | — | 0 |
| Principal Analog Circuit Design Engineer - SerDes Principal Analog Circuit Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications. Requires expertise in PLL, CDR, CTLE, DFE, ADC, or TX design, and experience with advanced FinFET CMOS technologies. Role involves technical direction, mentorship, and cross-functional collaboration. | — | 0 |
| Post Silicon Validation Engineer Intel is hiring a Post Silicon Validation Engineer in Haifa, Israel. This role involves developing validation architecture, test plans, methodologies, infrastructure, and content. The engineer will also perform deep dive investigations, advanced hardware/firmware/software debug, and bug fix definition for next-generation Intel processors. The position is for a College Grad and requires an on-site presence. | — | 0 |
| Senior Thermal Solutions Architect – Client Platforms Intel is seeking a Senior Thermal Solutions Architect to lead end-to-end thermal solution co-engineering with OEM customers across desktop and notebook platforms. This role involves defining system-level thermal architectures to enable performance scaling, reliability, and product differentiation across Intel's client portfolio, influencing platform decisions from concept through manufacturing. | — | 0 |
| Silicon Packaging Design Engineer This role focuses on the end-to-end development of silicon packaging substrate design, including physical layout, routing, and optimization of package performance. It involves working closely with silicon and hardware teams, defining design rules, and resolving design rule violations. The position also requires documentation, customer interaction, and providing consultation on packaging problems. | — | 0 |
| Embedded OS Software Engineering Developer (Zephyr RTOS) Embedded OS Software Engineering Developer role focusing on Zephyr RTOS, involving design, development, testing, and optimization of operating systems, hardware abstraction layers, OS services, and user space software subsystems. Responsibilities include implementing virtualization, containerization, connectivity stacks, networking, power management, and performance optimization, while collaborating with open-source communities and leading software development processes. | — | 0 |