NVIDIA
- HQ
- California, US
- Founded
- 1993
- Size
- 35,000+
- Website
- nvidia.com
NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 110 new AI-related roles. That is a -50% change versus the prior 30 days (218 → 110).
| Title | Stage | AI score |
|---|---|---|
| Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU Senior ASIC Design Verification Infrastructure and Tools Engineer at NVIDIA, focusing on improving High-Speed IO verification flows, automation, and CI systems. Requires experience in ASIC design, verification methodology, Python/Perl, SystemVerilog, and CI pipelines. | — | 0 |
| EDA Workflow Optimization Engineer NVIDIA is seeking an EDA Workflow Optimization Engineer to partner with engineering teams worldwide to understand and improve chip design workflows. The role involves investigating complex problems, building metrics, and enhancing scalable systems and tools to enable the next generation of chips. This is an engineering role focused on optimizing existing workflows and tools within the chip design process, not directly building AI models or systems. | — | 0 |
| Senior ASIC Verification Engineer - GPU Senior ASIC Verification Engineer to verify the process scheduling and system interface hardware of GPUs, working across software, architecture, design, and methodology teams. The role involves unit level verification, directed and random tests, test infrastructure development, and partnering with RTL and architecture teams. It also includes architecting verification strategies, supporting post-silicon validation, and leveraging AI for testbench development and automation. |
| — |
| 0 |
| Principal Thermal Mechanical Photonic Designer NVIDIA is seeking a Principal Thermal Mechanical Photonic Designer to work on the thermal and structural design of Silicon Photonic designs, including stress simulation, experimental methodology for thermal validation, and modeling thermo-mechanical interactions. The role involves supporting opto-mechanical system design, analyzing failures, and performing thermal characterization of electronic packages. Requires a PhD with 15+ years of experience, 8+ years in silicon photonics IC development, and proficiency in Ansys tools. | — | 0 |
| Senior ICV CAD Engineer NVIDIA is seeking a Senior ICV CAD Engineer to support the installation of foundry techfiles, debug design errors, and develop flows and scripts for custom circuit designers. The role requires a strong EE or CS background with an understanding of circuits, layouts, and VLSI design, along with expertise in ICV and Perl. | — | 0 |
| Senior Cache Coherency Architect NVIDIA is seeking an experienced Senior Cache Coherency Architect to design and develop scalable, low-latency, high-bandwidth coherent interconnect systems for their groundbreaking products. The role involves architecture definition, modeling, implementation, and collaboration with cross-functional teams throughout the project lifecycle, including silicon bring-up and debug. | — | 0 |
| Senior Design Verification Engineer - GPU Memory Subsystem Senior Design Verification Engineer for GPU memory subsystem at NVIDIA. Focuses on pre-silicon verification of ASIC memory subsystem IP, including caches, coherency, pipelines, and arbitration. Requires BS degree, 5+ years of ASIC verification experience, and knowledge of computer architecture and Verilog/System Verilog. | — | 0 |
| Senior Linux Developer - Networking Senior Linux Developer role focused on developing kernel drivers and userspace libraries for network devices. Requires strong C and Linux experience, with a focus on kernel programming and networking protocols. | — | 0 |
| System Verification Engineer NVIDIA is seeking a System Verification Engineer for their Emulation division. The role involves supporting emulation environments, bringing up GPUs and SOCs, verifying high-speed protocols, and debugging system-level test failures. The ideal candidate will have a Master's degree or equivalent experience in Electrical Engineering, Computer Science, or related field, with proficiency in Verilog/VHDL, C/C++, SystemVerilog, and UVM. Experience with high-speed protocols like PCIe/CXL/NVLINK/IB/Ethernet and CPU-GPU coherency is required. Familiarity with emulation tools and scripting languages like Python is essential. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer responsible for the physical design and implementation of GPUs and other ASICs, including floorplan, power/clock distribution, assembly, P&R, and timing closure. Requires extensive experience with VLSI physical design on advanced process nodes and proficiency with relevant CAD tools. | — | 0 |
| Senior Physical Design Engineer NVIDIA is seeking a Senior Physical Design Engineer to be responsible for the physical design and implementation of GPUs and other ASICs. This role involves establishing design methodologies, chip floorplan, power/clock distribution, assembly, P&R, and timing closure. The engineer will also craft designs for static timing analysis, power/noise analysis, and back-end verification, working with advanced process nodes (5nm, 4nm, 3nm) and various CAD tools. | — | 0 |
| Senior HPC Performance Engineer Senior HPC Performance Engineer at NVIDIA to analyze HPC applications on various systems (CPUs, GPUs) and identify optimization opportunities for compiler and application engineering teams. Requires strong programming, parallel architecture, and performance analysis skills. | — | 0 |
| System Software Engineer - GPU and SOC System Software Engineer focused on GPU and SOC kernel drivers, platform performance, power savings, and robustness for NVIDIA's production hardware. Requires strong C/C++ and OS fundamentals, with experience in system-level debugging and computer architecture. | — | 0 |
| Manager, Tegra Software Chip Manager for Tegra Software Chip at NVIDIA, responsible for leading and executing the entire silicon life cycle for various products. This role involves technical project management, coordinating software planning and execution, managing schedules, and interfacing with multiple teams and product groups. | — | 0 |
| Senior Embedded Software Engineer - AV Platform Senior Embedded Software Engineer for NVIDIA's Autonomous Vehicles Platform Team. Focuses on hardware platform and sensor integration (cameras, radars, lidars), software design, development, and bring-up for next-generation autonomous vehicles. Involves debugging complex issues across software and hardware domains within environments like Hypervisor, Linux, and QNX RTOS. | — | 0 |
| Senior SRAM Circuit Design Engineer Senior SRAM Circuit Design Engineer at NVIDIA, focusing on the design, verification, and characterization of next-generation SRAM for advanced processor designs in cutting-edge technologies. Responsibilities include transistor-level circuit design, optimization for power/timing/area/yield, layout floorplanning, timing characterization, and verification using Verilog/VHDL. Requires MS in Electrical/Computer Engineering or equivalent, 6+ years of experience, and strong background in deep submicron processes, SRAM design, and ASIC flows. | — | 0 |
| Senior ASIC Physical Design Engineer, Netlisting This role is for a Senior ASIC Physical Design Engineer focused on netlisting aspects of high-frequency and low-power CPUs, GPUs, and SoCs. Responsibilities include equivalence checking, asynchronous checking, logic synthesis, and timing convergence. The role requires significant experience in ASIC design flows and EDA tools, with proficiency in scripting languages. While NVIDIA is a leader in AI, this specific role is in hardware design for computing infrastructure, not direct AI model development or deployment. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs using Cadence tools in sub-micron CMOS technologies. Responsibilities include physical layout, cross-functional collaboration, and verification against design rules and schematics. Requires BSEE or equivalent, 7+ years of experience, deep understanding of analog circuit layout, proficiency with Cadence virtuoso, verification tools (Dracula, Hercules, Calibre), scripting languages (perl, python, skill), and DRC/LVS flows. | — | 0 |
| Senior I/O Specifications Architect This role focuses on architecting and developing chip requirements for industry-standard I/O interfaces (PCIe, CXL, UCIe), engaging with standards bodies, and collaborating with internal teams to define interconnect strategies for future AI and graphics systems. It requires deep knowledge of I/O technologies and system architecture. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to lead the design of CMOS high-speed interface circuits and mixed-signal circuits, including hands-on experience in silicon validation, debugging, characterization, and bring-up. The role involves designing high-speed transceivers and PLLs, simulating and verifying mixed-signal circuits, and working with multi-functional teams through implementation and productization. | — | 0 |
| System Software Engineer, GPU Development Tools System Software Engineer role at NVIDIA focused on developing core infrastructure for modeling, analyzing, and debugging large-scale GPU development. The role involves working at the interface of software drivers and GPU simulation, enabling functional and performance testing, and improving daily workflows for chip modelers and designers. Requires strong C++ programming and understanding of software driver stacks. | — | 0 |
| ASIC Verification Engineer - New College Grad 2026 NVIDIA is seeking an ASIC Verification Engineer to verify the Memory Management Unit for their GPUs. The role involves understanding design, developing verification infrastructure, implementing test plans, and collaborating with cross-functional teams. Requires a Bachelor's or Master's degree in EE/CS/CE, exposure to computer architecture, ASIC design/verification, and proficiency in SystemVerilog, C/C++, and constrained random testing. | — | 0 |
| Senior Systems Software Engineer, CUDA Driver NVIDIA is seeking a Senior Systems Software Engineer to work on the CUDA Driver, a core component of their platform for accelerating general-purpose computation on the GPU. The role involves designing, architecting, and implementing new features, coordinating development efforts, and defining improvements to CUDA APIs and the programming model. The ideal candidate will have strong C/C++ skills, experience with operating system interfaces, and a background in multithreaded programming. | — | 0 |
| Senior System Software Engineer - Autonomous Vehicles NVIDIA is seeking a Senior System Software Engineer to develop and bring their autonomous vehicle platform to market. The role involves working with experts in Deep Learning and Computer Vision to integrate and optimize software on NVIDIA's DRIVE platform, collaborate with internal and external teams, and provide technical support to customers. Requires strong C/C++ programming, system software/embedded systems experience, and OS fundamentals. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer for NVIDIA's Networking Silicon engineering team, focusing on the physical design and implementation of SOC devices for networking markets. Responsibilities include chip floorplan, power/clock distribution, P&R, timing closure, and physical verification, working with advanced process nodes (5nm, 4nm, 3nm). | — | 0 |
| Senior ASIC Timing Engineer Senior ASIC Timing Design Engineer role focused on physical design and timing of high-frequency and low-power DPUs and SoCs. Responsibilities include analyzing and optimizing design constraints, synthesis parameters, and driving frontend and backend implementation from RTL to GDS2. Requires expertise in Static Timing Analysis (STA), timing constraints, ECO implementation, physical design optimization, logic synthesis, and proficiency in scripting languages. | — | 0 |
| Research Scientist, Circuits - PhD New College Grad 2026 Research Scientist role focused on advanced circuit design for post-Moore's Law era, optimizing processor computation and interconnect performance/power. Involves exploring, designing, and implementing circuit approaches in prototype systems, collaborating with internal and external researchers, and transferring technology to product groups. Requires a PhD or equivalent experience in Electrical Engineering or related fields with a strong background in circuit design and publication history. | — | 0 |
| Senior Developer Technology Engineer, CPU Performance Seeking a Senior Developer Technology Engineer to research and develop techniques for optimizing large-scale applications on NVIDIA's CPU platforms, focusing on data-intensive workloads and heterogeneous computing systems. The role involves in-depth analysis, performance optimization, publishing findings, and influencing future hardware/software design. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to develop and implement high-speed interfaces and analog circuits for next-generation NVLINK. This role involves hands-on experience from concept to silicon characterization, including schematic design, layout, verification, and post-silicon debugging. The ideal candidate will have a Master's degree or equivalent experience with 5+ years in analog/mixed-signal circuit design, proficiency in industry-standard EDA tools, and strong analytical and debugging skills. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs in sub-micron CMOS technologies using Cadence tools. Responsibilities include physical layout, cross-functional collaboration with ASIC and mixed-signal engineers, and verification against design rules and schematics. Requires BSEE or equivalent, 7+ years of experience in Mask and Layout Design, deep understanding of analog circuit layout concepts, proficiency with Cadence virtuoso, experience with verification tools (Dracula, Hercules, Calibre, Primeyield), and scripting languages (perl, python, skill). Knowledge of DRC and LVS checking flows is also required. | — | 0 |
| Senior Memory System Engineer NVIDIA is seeking a Senior Memory System Engineer to join their ASIC Memory Subsystem team. The role involves developing and architecting innovative Memory Solutions for Tegra SoCs, collaborating with various teams (ASIC Architects, Designers, Software, Firmware, SI/PI, Memory suppliers) to design and architect high-speed, low-power memory technology. Responsibilities include analyzing future memory technologies, defining memory module/package/PCB layouts, debugging and bringing up memory evaluation/validation, and collaborating with DRAM suppliers. | — | 0 |
| Senior Hardware Validation Engineer Senior Hardware Validation Engineer role at NVIDIA, focusing on designing and executing validation plans for GPU and CPU modules within datacenter products. Responsibilities include debugging, root cause analysis, electrical/functional testing, and collaborating with cross-functional teams. Requires BSEE/BSCE or equivalent experience, 5+ years of validation experience, strong understanding of digital/circuit design, computer architecture, and programming skills in Python or similar scripting languages. Experience with ARM CPU architecture and hardware validation is also required. | — | 0 |
| CPU Performance Architect NVIDIA is seeking a CPU Performance Architect to innovate and improve CPU performance through modern microarchitectural ideas, performance modeling, and collaboration with build and verification teams. The role requires deep understanding of CPU microarchitecture and architecture, with at least 8 years of experience in frontline CPU projects. | — | 0 |
| Software Manager, Networking Software Manager to lead a team developing the NVLINK switch Operation System (OS) and firmware for next-generation networking technologies in HPC data centers. Responsibilities include team management, customer technical contact, feature ownership, and hands-on coding. | — | 0 |
| ASIC Hardware Design Engineer - New College Grad 2026 ASIC Hardware Design Engineer role at NVIDIA, focusing on system-level methodologies and RTL design for GPUs and SOCs. This is a new college grad position for 2026, requiring a Bachelor's or Master's degree in Electrical or Computer Engineering, with a strong academic background in digital design and computer architecture. Responsibilities include developing and automating design flows, implementing RTL features, and ensuring design quality through RTL checks. Programming experience in Python and knowledge of Verilog are required. | — | 0 |
| Software Engineer - DPU Platform Software Engineer role at NVIDIA focused on developing system software components for DPU platforms, including processor firmware, boot-loaders, kernel drivers, and user space applications. Requires experience in embedded systems, C/Python, and understanding of software/hardware interactions. Familiarity with build tools and high-performance processor architecture is needed. | — | 0 |
| Lead Design Engineer - Autonomous Vehicles Lead Design Engineer for NVIDIA's autonomous vehicle team, focusing on the electrical, mechanical, and thermal design of automotive setups, including compute and sensor integration. The role involves designing harnesses, developing BOMs, creating CAD models, and collaborating with OEMs and vendors to deliver scalable solutions from concept to prototype. | — | 0 |
| Offensive Hardware Security Researcher NVIDIA is seeking an Offensive Hardware Security Researcher to identify and exploit hardware vulnerabilities in SoC and GPU designs. The role involves developing security tools, researching attacks (side-channel, fault, physical), and guiding mitigation integration. Requires expertise in low-level programming, SoC architecture, and specific security fields like side-channel analysis, TEE, symbolic execution, or reverse-engineering. A track record of advancing offensive security research is valued. | — | 0 |
| Senior Software Engineer - CUDA and Unified Memory Senior Software Engineer to work on the CUDA driver and Unified Memory kernel driver, a core component of NVIDIA's platform for accelerating general-purpose computation on GPUs. The role involves architecting, implementing, and improving features for various computational workloads, including deep learning and scientific computation. | — | 0 |
| Senior Software Engineer - CUDA Driver Senior Software Engineer role focused on developing and implementing new features for the CUDA driver, a core component of NVIDIA's GPU computing platform. The role involves system-level expertise, collaboration with hardware architects and other teams, and advancing CUDA architecture across diverse workloads including deep learning. It requires strong C programming, systems software experience, and understanding of OS interfaces and system-level architecture. | — | 0 |
| Senior System Software Engineer, Performance - CUDA Driver Senior System Software Engineer focused on the CUDA driver and runtime for GPU acceleration. The role involves analyzing application performance, identifying bottlenecks in software/hardware, and developing features/optimizations for NVIDIA hardware across various computational workloads including deep learning, scientific computation, and more. Responsibilities include evangelizing, architecting, and implementing new features, analyzing full-stack performance, defining API improvements, and creating system software optimizations. | — | 0 |
| Senior Circuit Characterization Engineer NVIDIA is seeking a Senior Circuit Characterization Engineer to productize their chips into various solutions. The role involves silicon bringup and post-silicon characterization to optimize performance, power, yield, and quality, build methodologies for Analog, digital, and Mixed Signal circuits, design tools for efficiency, solve complex silicon and system level problems, and lead junior engineers. Requires BS/MS in EE/CE or equivalent, 5+ years of experience in silicon bring-up and post-silicon validation, and knowledge of various silicon characterization techniques and tools. Familiarity with Python, C/C++ is also required. | — | 0 |
| Senior Digital Design Verification Engineer - Hardware Senior Digital Design Verification Engineer at NVIDIA to verify SerDes IPs using UVM, SystemVerilog, and coverage-driven methodologies. Requires 5+ years of experience, strong verification background, and expertise in simulation/debug tools. Experience with bus protocols, mixed-signal designs, and programming languages like Python is a plus. | — | 0 |
| Senior Package Modeling Engineer This role focuses on Finite Element Analysis (FEA) for semiconductor package development, assessing stress, warpage, and thermo-mechanical behavior. The engineer will contribute to packaging technology roadmaps, evaluate new materials and processes, analyze material properties' impact on reliability, and establish modeling approaches. Collaboration with cross-functional teams and documentation of findings are key responsibilities. The role requires expertise in FEA tools, understanding of thermal-mechanical interactions, reliability failure modes, and advanced semiconductor packaging architecture. | — | 0 |
| HPC Operations Engineer NVIDIA is seeking an HPC Operations Engineer to design, implement, and operate large-scale compute clusters that power silicon development. The role involves troubleshooting, automation, configuration management, and ensuring system reliability and efficiency within a High-Performance Computing environment. | — | 0 |
| Custom SOC IP Verification Engineer Seeking a Senior Custom SOC/IP Verification Engineer to verify next-generation SoC and IP solutions, focusing on cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI). The role involves developing test plans, designing testbenches, and collaborating with cross-functional teams to ensure comprehensive verification of complex memory hierarchies in high-performance ASIC designs. | — | 0 |
| Senior STA Flow Engineer NVIDIA is seeking a Senior STA Flow Engineer to drive multi-physics sign-off strategies for GPUs and SoCs, optimizing performance, yield, and reliability. The role involves improving and validating timing analysis flows, developing custom flows for ETM models, and collaborating with technology leads and design teams to define sophisticated timing sign-off strategies. The position requires strong programming skills in Python, TCL, and PERL, and a solid understanding of CMOS design, clocking, and timing. | — | 0 |
| Senior Research Scientist, Circuits Seeking a Senior Research Scientist for Circuits to explore and develop future high-performance, low-power circuit technologies. The role involves designing and implementing circuit approaches in prototype systems, collaborating with internal and external researchers, and transferring technology to product groups. The candidate should have a strong publication record and expertise in high-performance circuit design. | — | 0 |
| Senior Compute Kernel Architect, GPU Power This role focuses on designing and optimizing CUDA kernels to enhance GPU power consumption and stress the Power Delivery Network (PDN). It involves collaborating with hardware architects, developing power stress microbenchmarks, and analyzing trade-offs between kernel throughput, power efficiency, and voltage stability. The position requires strong CUDA, C++, and Python programming skills, along with a solid understanding of GPU architecture and PDNs. | — | 0 |
| Senior Software Engineer - Accelerated Kubernetes Runtime Team NVIDIA is seeking a Senior Software Engineer to join their Accelerated Kubernetes Runtime team. The role involves designing and building automation systems for managing GPU-accelerated Kubernetes runtime distributions, focusing on seamless installation, upgrade, and management of cluster runtime packages for AI accelerators. The engineer will develop controller systems to optimize runtime components for latest GPU architectures, ensuring reliable and performant infrastructure for AI researchers and developers. | — | 0 |