AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| Senior Post Silicon Validation Engineer (Debug) This role is for a Senior Post Silicon Validation Engineer at AMD, focusing on the validation of next-generation server GPUs/accelerators. The responsibilities include test plan development, lab execution, debug, issue resolution, and driving cross-functional collaboration. The role requires hands-on lab debug experience with standard instrumentation and a strong understanding of GPU/accelerator architecture and high-speed interconnects. The position is located in Penang, Malaysia. | — | 0 |
| BMC Firmware Engineer (Server) This role is for a BMC Firmware Engineer responsible for designing, developing, and maintaining firmware for AMD server platforms. The engineer will work on firmware that spans pre-silicon and post-silicon for AMD SoCs, collaborating with cross-functional teams and customers. Responsibilities include firmware design, development, debugging, verification, and validation, as well as customer support and requirement analysis. Familiarity with server management standards, OpenBMC, ARM-based SoC architectures, and C/C++ programming is preferred. | — |
| 0 |
| Sr. Analog Designer This role is for a Sr. Analog Designer focused on Signal & Power Integrity for AMD's AI server products. The responsibilities include PCB stack up design, SI/PI simulation and analysis, creating layout guidelines, and reviewing electrical validation reports. The role requires experience with server debug progress for electrical violations and collaboration with cross-functional teams. | — | 0 |
| Sr. Analog Designer This role is for a Sr. Analog Designer focused on Signal & Power Integrity for AMD's AI server products. The responsibilities include PCB stack up design, SI/PI simulation and analysis, creating layout guidelines, and reviewing electrical validation reports. The role requires experience with server debug progress for electrical violations and collaboration with cross-functional teams. | — | 0 |
| Software Development Engineer 2 Software Development Engineer 2 at AMD in Bangalore, India, focused on designing and implementing automation solutions and infrastructure for AMD AI products, particularly DCGPU clusters. Requires proficiency in Python and Golang, experience with enterprise-level software architecture, and system-level debugging. Preferred experience includes CI/CD, Azure, and Kubernetes. | — | 0 |
| IP Verification Engineer AMD is seeking an IP Verification Engineer to join their team in Karnataka, India. The role involves developing and maintaining tests for functional and performance verification at the core level, building testbench components, creating hardware emulation builds, and providing technical support. The ideal candidate will have a passion for processor architecture, digital design, and verification, with experience in C/C++, SystemVerilog, and UVM. | — | 0 |
| Systems Design Engineer This role is for a Systems Design Engineer at AMD, focusing on customer server system development program technical support from concept to end of life. It involves concept design, schematic and layout review, signal integrity and power integrity, electrical validation, system integration, and manufacturing support. The engineer will work with partners to enable successful deployment of AMD server platforms, provide technical collateral, perform design reviews, support bring-up and validation, and engage directly on technical topics with customers and internal teams. | — | 0 |
| Design Verification Engineer AMD is seeking a Design Verification Engineer to join their team, focusing on delivering high-quality, industry-leading technologies. The role involves analyzing complex verification and digital design problems, driving test planning and execution, collaborating with RTL, PHY, and firmware teams, and owning coverage closure. The engineer will also develop and enhance verification infrastructure and automation. Experience with memory subsystems, high-speed interfaces, System Verilog, UVM, C/C++, and scripting is preferred. | — | 0 |
| Silicon Design Verification Engineer This role is for a Silicon Design Verification Engineer at AMD. The engineer will be responsible for planning and executing verification of complex digital design blocks, creating testbenches, debugging tests, and performing coverage analysis. Experience with System Verilog, UVM, and simulation tools is preferred, along with an understanding of ASIC development phases and various verification techniques. | — | 0 |
| Senior Engineer-Customer Tools AMD is seeking a Senior Engineer-Customer Tools to be the primary technical authority for the design, definition, and delivery of the Serviceability Engine, a critical component underpinning AMD's serviceability strategy across its product portfolio. This role involves translating high-level serviceability goals into engineering requirements, architectural specifications, and delivery plans, working closely with Program Managers and Platform Architects. Responsibilities include owning the architectural vision, defining specifications for error detection, reporting, fault isolation, and recovery, leading architectural reviews, evaluating trade-offs, establishing standards, and providing technical guidance. The role also involves partnering with Program Managers on delivery plans, identifying technical risks, and acting as a technical interface with various internal teams and external stakeholders. Familiarity with data center and cloud serviceability requirements is preferred. | — | 0 |
| SoC Security and Virtualization Validation Engineer AMD is seeking a Security IP and Virtualization Validation Engineer to join their datacenter CPU and AI post-silicon validation team. The role involves developing and executing test plans for security and virtualization features in next-generation AMD Instinct GPUs, creating test content, developing post-silicon validation infrastructure, and collaborating with cross-functional teams for root cause analysis of platform issues. Requires strong programming skills (C/C++, Python), post-silicon lab experience, and knowledge of server SOC architecture. | — | 0 |
| RTL Design Engineer AMD is seeking an RTL Design Engineer to join their Silicon IP solutions & SOC group. The role involves technical leadership across the design hierarchy, from architecture to productization, for complex IP solutions. Responsibilities include defining micro-architecture, evaluating design plans, RTL design, IP integration, documentation, and mentoring junior engineers. Experience with Verilog RTL design, VCS simulation, and scripting is preferred, along with a strong track record in developing leading-edge IP solutions like PCIe, DMAs, NVMe, or networking IPs. | — | 0 |
| CPU/Cores Post‑Silicon Validation (Virtualization) This role is for a Staff Engineer focused on post-silicon validation of CPU cores using virtualization. The engineer will stress core microarchitecture, identify silicon issues, and collaborate with design teams for root-cause analysis and resolution. The role treats virtualization as a primary validation vector to uncover real-world core issues under production-like stress. | — | 0 |
| Lead Engineer – Systems & Performance Engineering This role is for a Lead Engineer in Systems & Performance Engineering at AMD, focusing on improving products, exploring opportunities, and providing consultative direction. The role involves performance, automation, and development, with a need for strong programming skills in Python, C, or C++ and experience with system benchmarks. While the company emphasizes AI, this specific role is not directly building or researching AI models. | — | 0 |
| Lead Architect – Programmable Clock Architecture Lead Architect for Programmable Clock Architecture at AMD in Hyderabad, India. This role involves leading a team to develop clocking solutions for Adaptive-Embedded Computing products, collaborating with global teams, and addressing complex SOC clocking challenges. Responsibilities include developing clock distribution methodologies, analyzing clock timing, and collaborating with various IP teams. Requires deep understanding of system-level clocking, leadership skills, and expertise in STA and EDA tools. | — | 0 |
| Staff Software Development Engineer Software Development Engineer in the Business Enterprise Applications team, focusing on IT Global Operations & Supply Chain. The role involves developing product security, analyzing system performance impacting AMD's product lifecycle, and improving the quality of generated code. It requires strong software development, debugging, and communication skills, with a focus on collaborating with developers and global operations teams to enhance the security of the compute base. | — | 0 |
| Senior Product Development Engineer (Data Center Farm) This role is for a Senior Product Development Engineer at AMD, focusing on Data Center Server SoC Post-Silicon features validation and enablement. The engineer will work on hardware planning, content planning, data analyzing, developing and executing validation test plans, monitoring data center farm execution, debugging, and developing post-silicon validation infrastructure. The role requires experience with data center farms, volume validation, automation frameworks, and SoC/system level debugging, along with programming/scripting skills. | — | 0 |
| Senior Lead IP Design Engineer This role is for a Senior Lead IP Design Engineer at AMD, focusing on micro-architecting, designing, and delivering data fabric IP RTL components. The engineer will manage power, performance, and area requirements, working with architecture, verification, and physical design teams to ensure silicon success. The role involves defining features, digital design implementation, RTL coding, leading design domains, and post-silicon support. Experience in fabric/transport architecture, coherency, and memory/cache design is preferred. | — | 0 |
| SoC DFX Staff Engineer Seeking an experienced SoC DFX Engineer to define, design, and verify Design for Test (DFT) and Design for Debug (DFD) solutions for complex, high-performance SoCs. This role involves collaboration with architecture, RTL, firmware, and verification teams to integrate DFX features for silicon validation, bring-up, and debug across the product lifecycle. | — | 0 |
| Senior PC Board Design Engineer AMD is seeking a Senior PC Board Design Engineer to work on their Data Center GPU organization, focusing on designing high-speed PCB layouts for AI-based Graphic Processors. The role involves developing routing strategies, collaborating with various engineering teams, and contributing to new tools and processes for mass volume manufacturing. | — | 0 |
| PCIe / CXL and HSIO Validation Engineer This role is for a Principal Validation Engineer focused on PCIe, CXL, and HSIO interfaces for AMD's datacenter CPU post-silicon validation. Responsibilities include developing and executing test plans, creating test content, developing validation infrastructure, debugging issues, and collaborating with cross-functional teams. The role requires experience with high-speed IO interfaces, silicon bring-up, and programming/scripting languages. | — | 0 |
| Senior Firmware Engineer (Embedded & RTOS) Senior Firmware Engineer role focused on developing and supporting firmware for AMD's interconnect technologies (PCIe, CXL, USB4, etc.) in both pre-silicon and post-silicon environments. Requires strong C/C++/Python skills, embedded programming, RTOS experience, and hardware knowledge. The role involves contributing to firmware design, development, debug, and production cycles within a collaborative, multi-functional team. | — | 0 |
| CPU Cores Validation Senior Staff Engineer This role is for a Senior Staff Engineer in CPU Cores Validation at AMD. The primary focus is on validating the functionality and testability of next-generation CPU cores and caches through hardware system setup, x86 software development, and debugging. The role requires strong analytical and problem-solving skills, attention to detail, and the ability to drive project deliverables across cross-functional teams. While the company mentions AI and next-generation computing, the core responsibilities are in traditional silicon validation engineering, not direct AI/ML model development or deployment. | — | 0 |
| Lead Software Development Eng. Lead Software Development Engineer for AMD's Business Enterprise Applications team, focusing on IT Global Operations & Supply Chain. The role involves developing product security, analyzing system performance impacting AMD product lifecycle, and improving generated code quality. Requires strong software development, debugging, and communication skills, with experience in Java, .Net, C++, Python, SQL, UNIX/Linux, and security principles. | — | 0 |
| System Firmware Test Development Engineer AMD is seeking a System Firmware Test Development Engineer to join their firmware validation team. The role involves shaping firmware validation across pre-silicon and post-silicon environments by building scalable, automation-ready test solutions. Responsibilities include defining test strategies, designing end-to-end test flows, building automation-ready tests, analyzing requirements, executing tests, debugging failures, and contributing to simulation environments and test infrastructure improvements. The role emphasizes collaboration with firmware architects and SoC design teams, with a focus on low-level system behavior and building reliable test solutions. While AI-assisted tooling is mentioned, the core of the role is firmware validation for CPUs and GPUs. | — | 0 |
| Technical Release Lead (Data Center GPU) This role is for a Release Manager at AMD, focusing on the Data Center GPU product line. The primary responsibilities include feature planning, roadmap alignment, and managing the bug triage process to ensure timely resolution of defects. The role also involves coordinating software releases across multiple business units and driving continuous improvement of release processes. While the company mentions AI and data centers, the core function of this role is release management and process coordination, not direct AI/ML development. | — | 0 |
| Staff Digital IC Design Engineer This role is for a Staff Digital IC Design Engineer at AMD, focusing on the front-end digital design flow for RF data converters and digital signal processing within advanced mixed-signal environments. Responsibilities include architecture specification, RTL design and optimization, verification, and synthesis, with a technical leadership component. The role requires expertise in SystemVerilog, logic design, and modern IC design flows, and collaboration with analog design, verification, and physical design teams. | — | 0 |
| Lead GPU Formal Verification Engineer Lead GPU Formal Verification Engineer at AMD in Cambridge, UK. This role focuses on driving cutting-edge formal verification techniques for next-generation graphics IP design, defining strategy, methodology, and infrastructure. The ideal candidate will have proven experience in formal verification for complex processors and leadership skills to guide the formal verification team. | — | 0 |
| Staff Systems Administrator Staff Systems Administrator role at AMD in Bangalore, India, focusing on leading onsite IT operations and end-user support, including AI adoption. Responsibilities include technical support for hardware and software, team leadership, IT project management, and collaboration with other IT teams. Requires strong troubleshooting, multi-platform expertise including AI tools, and people leadership. | — | 0 |
| Staff BMC Firmware Engineer (Server) This role is for a Staff BMC Firmware Engineer responsible for designing, developing, and maintaining firmware for AMD GPU server platforms. The engineer will lead end-to-end firmware development, drive requirement analysis, architect validation scripts, and partner with development teams. Experience with server management standards, OpenBMC, C/C++, Python, and ARM-based SoC architectures is preferred. | — | 0 |
| Programmable Logic Engineer (FPGA Execution) This role focuses on the development, simulation, testing, and debugging of FPGA solutions for server systems. While the company mentions AI and AMD's mission includes AI, this specific role is centered on hardware engineering for FPGAs, not direct AI/ML model development or deployment. | — | 0 |
| Mechanical Engineer Mechanical Engineer at AMD responsible for the infrastructure thermal design and implementation, validation and technology development for AMD Instinct products. This role involves leading the design and development of mechanical and thermal systems for next-generation Instinct products, defining, developing, and validating thermal and mechanical solutions, and collaborating with cross-functional teams. | — | 0 |
| Sr. Product Development Engineer AMD is seeking a Sr. Product Development Engineer to join their Product Engineering organization, focusing on end-to-end test and manufacturing solutions for next-generation processors used in high-performance computing, data center, and enterprise applications. The role involves developing and validating sort hardware, driving test content bring-up, and ensuring quality and yield metrics are met. The ideal candidate will have a strong background in ATE hardware development, preferably Advantest 93K, and possess excellent stakeholder management and communication skills. | — | 0 |
| Hardware Systems Design Engineer - Circuit Board This role is for a Hardware Systems Design Engineer focused on circuit board design for cloud compute server systems. The engineer will lead development from concept to production, collaborate with cross-functional teams, and ensure product quality, performance, and schedule. | — | 0 |
| Firmware Memory Engineer This role focuses on the firmware design and development for high-speed memory interfaces (LPDDR, DDR) and inter-chip IO IPs. It involves pre- and post-silicon development, including RTL, firmware/hardware co-design, and algorithm design for memory PHYs. The responsibilities include firmware design for DDR PHY & DRAM Training, ATE testing, lab bring-up, and optimization for robust links. While the company mentions AI and data centers, the core of this role is in firmware engineering for memory hardware, not AI model development. | — | 0 |
| Software Engineer - FPGA Physical Implementation Software engineer role focused on developing and optimizing algorithms for FPGA physical implementation tools, including placement, routing, and timing. The role involves improving performance, scalability, and quality of results within AMD's FPGA toolchain, with exposure to emerging areas like Network-on-Chip architectures. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD, focusing on RTL design verification for memory and systems IP. Responsibilities include developing testbenches, interacting with architects and designers, creating test plans, and improving productivity through automation. | — | 0 |
| ASIC Design Verification Engineer AMD is seeking an ASIC Design Verification Engineer to join their MSIP UMC team. The role involves all aspects of IP verification, including architecture, test plans, environment development, and closure. The engineer will work on leading-edge DDR technologies for data center and machine learning workloads, contributing to the development of client, server, embedded, graphics, and semi-custom chips. Responsibilities include collaborating with architects, taking ownership of features, developing verification environments using System Verilog/UVM/SystemC, debugging regressions, and deploying verification methodologies. | — | 0 |
| Analog Designer (1 year contract) This role focuses on physical verification of I/O pad rings for AMD products, ensuring integration issues are identified and resolved before final chip integration. Responsibilities include assembling macros/IPs into a database, running verification tools (DRC, LVS, ERC, PERC), and facilitating reviews and waivers. | — | 0 |
| Lead Board Hardware Debug Engineer – Datacenter & AI Platforms Lead Board Hardware Debug Engineer for Datacenter & AI Platforms at AMD. Focuses on complex board-level debug, hardware validation from prototype to production, and system-level integration for high-performance GPU platforms. Requires strong skills in signal integrity, PCB-level debug, and problem-solving across silicon, firmware, and system domains. | — | 0 |
| Board Design & Field Systems Engineer – New Product This role focuses on board design and system engineering for high-performance FPGA/ASIC platforms, involving schematic design, component selection, system architecture, PCB layout, SI/PI optimization, hardware bring-up, complex debugging, DVT execution, root-cause analysis, and technical liaison for field deployments. It requires cross-stack troubleshooting across hardware, firmware, and system software, and collaboration with cross-functional teams and external partners. | — | 0 |
| Sr. Architect Workload Driven Power and Energy Modeling AMD is seeking a technical leader to define and scale workload-driven power and energy modeling across CPU cores and SoC platforms. This role will connect workload behavior to architecture, design, and implementation decisions, improving early insight and enabling better performance-per-watt tradeoffs. The candidate will partner across Methodology, Cores Architecture, SoC Architecture, and Physical Design to build methods that scale across products. | — | 0 |
| Silicon Design Engineering Leader This role is for a Silicon Design Engineering Leader at AMD, focusing on driving SOC design execution, tape-outs, and people management. While the company is involved in AI and data centers, and may use AI for screening, the core responsibilities of this role are in traditional silicon design and engineering leadership, not direct AI/ML model development or deployment. | — | 0 |
| Security Software Engineer Software Engineer focused on application security for AMD's Vivado FPGA toolchain, protecting sensitive software and customer IP against reverse engineering, tampering, and data exposure. The role involves maintaining, improving, and evolving security features within an existing framework, with a strong emphasis on C++ development and practical security principles. | — | 0 |
| Hardware System Level Test (SLT) Product Development Engineer Develops and drives System Level Test (SLT) solutions for new and existing AMD microprocessors used in embedded systems, automotive, robotics, and networking. Responsibilities include test program development, debug, characterization, yield improvement, and collaboration with cross-functional teams to ensure product quality and manufacturing readiness. | — | 0 |
| Automation Software System Design Engineer This role focuses on designing and implementing automation solutions to improve efficiency and quality across AMD's product lines, particularly in computing and graphics. The engineer will develop automation frameworks, integrate tools, and debug system-level issues across hardware and software. While AI tools are mentioned as preferred experience for productivity, the core function is automation engineering for product development, not direct AI model building or research. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD in Bangalore, India, focusing on verifying new and existing features for AMD's graphics processor IP. Responsibilities include collaborating with architects and engineers, building verification tests, debugging failures, and analyzing test plans. Requires 8+ years of ASIC Design Verification experience, strong computer architecture knowledge, and proficiency in C++ and assembly language. | — | 0 |
| Senior RTL Design Lead - CPU Team This role is for a Senior RTL Design Lead focused on CPU team at AMD. The responsibilities include RTL design of high performance x86-core ISA features, clock/reset/power features of processor, IP Integration, sub-system level design, architecting and designing power management features, cache, coherency, and design optimization for power efficiency. The role also involves leading the design team, mentoring junior members, and representing AMD to the technical community. The preferred experience includes 11+ years in Digital IP/ASIC design, Verilog RTL development, and familiarity with the full IP design cycle. | — | 0 |
| Principal Cache RTL Design - CPU Team This Principal Cache RTL Design role at AMD focuses on the RTL design of high-performance x86-core ISA features, power management, cache, and coherency. It involves IP integration, sub-system level design, and optimization for power efficiency. The role requires extensive experience in digital IP/ASIC design, Verilog RTL development, and familiarity with the full IP design cycle, including verification, synthesis, and post-silicon validation. Leadership and mentoring of junior engineers are also key responsibilities. | — | 0 |
| Staff Emulation Silicon Design Engineer Staff Emulation Silicon Design Engineer at AMD responsible for realizing advanced designs on emulation platforms, collaborating with various teams to ensure successful silicon delivery. The role involves architecting emulation test benches, developing build flows, and creating tools to enhance efficiency. The candidate will also contribute to methodology improvements, define and execute test plans, lead debug activities, and verify cutting-edge features. The company is exploring AI to enhance emulation execution and workflow efficiency. | — | 0 |
