AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| Senior Synthesis PD Engineer This role is for a Senior Synthesis PD Engineer at AMD, focusing on the physical design and synthesis of complex IPs for computing experiences, including AI and data centers. The engineer will work closely with architecture, IP design, and product engineering teams to optimize PPA (Power, Performance, Area) for these IPs. Responsibilities include synthesis, constraint development, and physical-aware activities like floorplanning and placement. The role requires a strong understanding of the backend design cycle and experience in synthesis/PD/constraints. | — | 0 |
| Senior Product Development Engineer - Wafer Sort Development Develops and validates wafer sort test hardware and solutions for next-generation processors used in high-performance computing, data center, and enterprise applications. Owns the sort hardware solution from development through bring-up, ensuring quality and yield performance. | — | 0 |
| Sr. Systems Design Engineer |
| — |
| 0 |
| Lead verification Engineer - high speed protocol Lead Verification Engineer for Data Center Networking IPs and systems, focusing on high-speed protocols like PCIe, Ethernet, CXL, RoCE/NVMe-oF. Responsibilities include architecting testbenches, developing verification plans, writing SystemVerilog/UVM, and using scripting languages for automation. The role also involves collaboration, leadership, and mentoring. | — | 0 |
| Systems Design Engineer 2 This role is for a Systems Design Engineer at AMD, focusing on the design of AI server boards. The engineer will work cross-functionally to deliver high-quality designs, conduct design reviews, and debug issues throughout the product lifecycle. Experience with server board design, debug processes, and specific design tools like Cadence's Concept and Allegro is required. | — | 0 |
| Synthesis STA Lead This role is for a Senior Member of Technical Staff (SMTS) Silicon Design Engineer in the NBIO IP Physical Aware group at AMD. The primary responsibilities involve synthesis, Static Timing Analysis (STA), constraint development, and physical-aware activities like floorplanning and placement. The role also includes leading junior team members. While the company mentions AI and data centers, the core responsibilities of this specific role are in silicon design and verification, not AI/ML model development or deployment. | — | 0 |
| Senior Design Verification Engineer Senior Design Verification Engineer role focused on planning, building, and executing verification of wired networking IP features. Responsibilities include collaborating with architects and engineers, building test plans, writing and debugging directed and random verification tests, and reviewing coverage metrics. Requires proficiency in IP level ASIC verification, UVM, and SystemVerilog. | — | 0 |
| Senior Physical Verification Engineer (Full-Chip/SoC) AMD is seeking a Senior Physical Verification Engineer to join their Server SOC PD group. This role will be responsible for full-chip Physical Verification signoff (DRC/LVS/ERC/DFM/Antenna/PERC) and methodology ownership on advanced nodes, partnering cross-functionally to ensure tapeout-quality delivery. The engineer will work with cutting-edge designs and solve critical physical verification issues. | — | 0 |
| IP/SOC Verification with power management Engineer This role is for an IP/SOC Verification Engineer with a focus on power management features for Server SOCs. Responsibilities include developing test plans, creating coverage models, building UVM testbenches, verifying power management interactions, debugging issues, and ensuring functional coverage closure. The role also involves participating in architecture reviews and supporting post-silicon validation. | — | 0 |
| Program Manager Program Manager at AMD responsible for driving the schedule, logistics, and overall program success of a product engineering team focused on AMD Instinct Accelerators. The role involves managing product deliverables, schedules, cross-functional activities, pre-silicon planning, customer sample execution, and high-volume manufacturing readiness. It requires collaboration with various internal organizations and geographically distributed teams. | — | 0 |
| Test Engineer This role is for a Test Engineer at AMD, focusing on the full product life cycle of boards and systems, including pre-silicon, new product introduction (NPI), and production phases. Responsibilities include developing automated test equipment, debugging hardware and software issues, analyzing data for device performance, and driving yield improvement and cost reduction in mass production. The role involves close collaboration with cross-functional teams, vendors, and leading engineering teams to guide GPU and datacenter products from NPI to mass production. Experience with hardware troubleshooting, common test equipment, Linux environments, and scripting (Python) is preferred. The role is based in Hsinchu, Taiwan. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD, focusing on verifying PCI Express designs using UVM and developing test plans for next-generation products. The role involves all aspects of ASIC design stages, including testbench development, test case writing, coverage analysis, and debugging. | — | 0 |
| Fellow - FPGA architecture Seeking a Fellow Architect to define and drive next-generation architecture for AMD’s adaptive FPGA devices, focusing on configuration, readback, and Partial Reconfiguration (PR). This role involves shaping the long-term vision for bitstream architecture, configuration flows, runtime reconfiguration, debug observability, and system integration, translating customer requirements across various domains into differentiated FPGA capabilities. | — | 0 |
| Manager Software Development Manager of Software Development at AMD, focusing on leading a team to develop innovative software features, bring up new products, and improve existing software quality for internal and external customers. The role involves project planning, software design, development, verification, release, team management, and cross-functional collaboration. Experience in embedded programming, C/C++, operating systems, and complex system software product delivery is preferred. | — | 0 |
| Senior Mechanical Product Engineer Senior Mechanical Product Engineer at AMD, focusing on the manufacturing readiness and production execution of Data Center GPU products. This role acts as a technical interface between design engineering and manufacturing, ensuring hardware can be correctly built, inspected, and tested at scale. Responsibilities include translating design intent into production processes, debugging issues, and driving corrective actions across cross-functional teams and external partners. | — | 0 |
| IT Onsite Support Administrator This role provides IT support for employees and contractors, focusing on client technology and audio-visual services. Responsibilities include first and second level support, laptop imaging and deployment, IT onboarding, incident management, and project support. Familiarity with AI tools like CoPilot and Claude is desired. | — | 0 |
| Post-Silicon Full-Chip Validation Engineer This role is for a Post-Silicon Full-Chip Validation Engineer at AMD, focusing on validating critical technologies for AMD EPYC data center CPUs that power AI and cloud workloads. The engineer will use agentic AI to develop validation test plans and workloads, debug issues, and contribute to validation infrastructure. The role requires experience in CPU/SoC post-silicon validation, programming skills (C/C++, Python), and familiarity with agentic AI concepts and tools. | — | 0 |
| Systems Power Design Engineer This role is for a Systems Design Engineer at AMD, focusing on developing and implementing System Power Modeling methodologies and frameworks. The engineer will work on diverse system architectures, analyze power impact, and drive technical innovation in product development and validation. The role requires programming/scripting skills and experience with system architecture and debug. | — | 0 |
| DDR Lead Verification Engineer This role is for a Lead Verification Engineer at AMD, focusing on planning, building, and executing verification for Memory Controller IP. It involves collaborating with architects and hardware engineers, building test plans, writing and debugging verification tests, and ensuring coverage requirements are met. Experience with memory controllers and ASIC verification is preferred. | — | 0 |
| Customer Debug Lead Customer Debug Lead at AMD, focusing on enabling successful deployment of AMD server platforms by providing technical collateral, debugging, and solutions to customers. The role involves hardware/software platform design, system architecture, and direct customer engagement for issue resolution. | — | 0 |
| Senior Software Development Engineer - C++ This role is for a Senior Software Development Engineer focused on C++ development for AMD's Vivado Design Suite, an IDE for FPGA and adaptive SoC design. The responsibilities include algorithm development, feature delivery, debugging, and mentoring engineers. While the company mentions AI and its use in screening, the core function of this role is not AI/ML development but rather software engineering for hardware design tools. | — | 0 |
| Systems Design Engineer This role is for a Systems Design Engineer at AMD, focusing on the design of AI server switch products. The engineer will work with cross-functional teams to deliver high-quality designs, review hardware, debug issues, and discuss specifications with customers. The role requires extensive experience in Ethernet switch hardware and product development, as well as cross-functional team collaboration and debugging. | — | 0 |
| Systems Design Engineer This role is for a Systems Design Engineer focused on AI server switch products. The engineer will work with cross-functional teams to design, debug, and validate these products, ensuring they meet customer requirements and specifications. The role involves design reviews, issue investigation, and defining switch specifications. | — | 0 |
| Packaging Engineer This role is for a Packaging Engineer at AMD, focusing on OSAT factory backend NPI bringup and production sustaining. Responsibilities include managing NPI activities, driving risk assessment and qualification for new products/processes, ensuring schedule control with quality validation, managing external manufacturing sites for product specifications and KPIs, resolving issues, executing projects, and managing engineering changes. The role also involves using AI tools for optimization and intelligence, site support, vendor management, and potentially assisting with regional vendor management. Preferred experience includes semiconductor packaging, NPI, DFM, supplier management, problem-solving techniques, statistical control tools, and AI tool usage. The role requires a Bachelor/MS degree in Mechanical, Material, or Manufacturing Engineering. | — | 0 |
| Hardware Development Eng. This role is for a Power Test Engineer focused on PSU validation and test automation for server power platforms. It involves firmware validation, regression testing, hardware characterization, and automated test development. The role requires experience in power electronics testing, lab instrumentation, and automation scripting (Python, C#). While the company mentions AI and its own AI policy, this specific role is not directly involved in building or researching AI/ML models. | — | 0 |
| Physical Design Engineer This role is for a Physical Design Engineer at AMD, focusing on improving Performance, Power, and Area (PPA) for next-generation graphics processor IP. The engineer will collaborate with RTL, Physical Design, Methodology, and CAD teams to translate architectures into silicon, influencing design decisions from concept to tape-out. Responsibilities include driving PPA improvements, optimizing memory placement and synthesis recipes, resolving bottlenecks, exploring area/power savings, optimizing tools/flows, and delivering best-known recipes. Preferred experience includes ASIC Physical Design, RTL analysis, timing analysis, library understanding, experience with low-voltage design and STA correlation, and experience with taping out advanced SOC nodes. The role also involves mentorship. | — | 0 |
| System Software Engineer System Software Engineer at AMD responsible for designing and developing Scandump and JTAG tools for AMD products, spanning pre-silicon architecture to post-silicon implementation. The role involves coordinating with engineering teams, debugging issues, and driving continuous improvement for Scan tools. Requires a self-starter with experience in C#, Python, SQL, and familiarity with C++, DFT, and X86 architecture. | — | 0 |
| IREM Physical Design Engineer This role focuses on power integrity solutions for AMD's next-generation SoCs and advanced packaging technologies. Responsibilities include defining and optimizing power delivery networks, performing IR-drop and EM analysis, and shaping design methodologies for CPU/GPU products. The role involves partnering with physical design, packaging, and CAD teams, and influencing architecture-level decisions. | — | 0 |
| AI Scale-up Switch System Design Engineer AMD is seeking a system design engineer to lead the bring-up and validation of AI scale-up switches for next-generation AI rack infrastructure. The role involves deep expertise in high-speed Ethernet, server management, and platform validation, with responsibilities including link bring-up, performance testing, and debugging complex system-level failures. The engineer will collaborate with hardware, firmware, and software teams to deliver production-ready systems and develop test automation scripts. | — | 0 |
| Paralegal - Procurement Contracts This role supports direct and indirect materials contracting within the Procurement Legal function, managing a high volume of work with minimal supervision. Responsibilities include drafting, reviewing, and negotiating procurement agreements, managing intake governance, and identifying process improvements. The role also supports the use of automation and AI tools to improve efficiency. | — | 0 |
| GPU SDK Engineer. This role focuses on designing, developing, and maintaining GPU SDK components and libraries for graphics and compute applications. It involves implementing rendering techniques, optimizing GPU workloads, developing API interfaces, and collaborating with various stakeholders. The role requires strong C++ and HLSL skills, understanding of GPU pipelines, and experience with profiling tools. | — | 0 |
| UEFI/BIOS Firmware Engineer This role is for a Senior Member of Technical Staff (SMTS) engineer on the AMD Datacenter Firmware team, focusing on the EPYC product line. The engineer will develop and deploy firmware solutions for server products, including advanced chiplet designs and optimized IO architectures, to ensure customers can leverage EPYC designs and deliver scalable, robust, high-quality server platform BIOS solutions. The role requires deep technical expertise in firmware development, strong problem-solving skills, and the ability to influence cross-functional teams, with a mandatory requirement for in-depth UEFI BIOS development experience and server BIOS architecture knowledge. | — | 0 |
| Analog Layout Engineer Analog Layout Engineer role at AMD, focusing on full custom layouts in cutting-edge technology nodes. Responsibilities include handling sub cells, chip-level integration, physical verification, and electrical closure. Requires expertise in custom layout, digital, analog, and mixed-signal design, with a strong understanding of electrical parameters and reliability concepts. The role is primarily an individual contributor with leadership potential. | — | 0 |
| Senior Virtual Software Modeling Engineer Develop Fast Platform Models that simulate software-visible behavior of AMD’s next-generation designs to enable pre-silicon development of firmware, system, driver and application software. This role involves developing high-performance C++ functional models of AMD SoCs and platforms, working closely with architecture teams, improving existing models, developing tests, and assisting customers with debugging workloads on models. | — | 0 |
| SOC / IP Verification Engineer This role is for a SOC/IP Verification Engineer at AMD, focusing on planning, building, and executing verification for graphics processor IP. The responsibilities include collaborating with architects and engineers, building test plans, writing and debugging verification tests, and reviewing coverage metrics. The role requires proficiency in IP level ASIC verification, debugging firmware and RTL, and experience with UVM testbenches, Verilog, System Verilog, C, and C++. | — | 0 |
| Emulation Engineer Emulation Engineer in AMD’s Server SoC team responsible for validating next-generation server-class SoCs using advanced emulation platforms, ensuring silicon is bug-free, high-performance, and server-grade reliable. | — | 0 |
| Graduate Trainee - Financial Accountant (Automation) This role focuses on financial reporting and accounting processes, with a key responsibility in driving automation initiatives to enhance efficiency and provide insights. The role involves implementing improvements, developing automation solutions, and supporting audits and compliance. Experience with automation and AI tools is preferred. | — | 0 |
| Technical Program Manager - Manufacturing Test and Readiness - Data Center GPU This role is for a Technical Program Manager focused on Manufacturing Test and Readiness for AMD's Data Center GPU products. The role involves end-to-end test strategy, ASIC validation, firmware/software enablement, platform bring-up, and high-volume manufacturing. Key responsibilities include defining test program content, driving cross-functional execution, managing project risks, leading debug of manufacturing failures, and architecting manufacturing test programs for yield and test time optimization. While the company mentions AI and its use in screening, the core function of this role is in hardware manufacturing and test, not AI/ML development. | — | 0 |
| Sr. Systems Design Engineer This role is for a Sr. Systems Design Engineer at AMD, focusing on improving AMD's capabilities in product development, validation, and debugging. The role involves driving technical innovation, developing tools and scripts, enhancing methodologies, and debugging issues across SOC programs. It requires programming/scripting skills and knowledge of system architecture and debug techniques. | — | 0 |
| FPGA Development Engineer AMD is looking for an FPGA Development Engineer to design out-of-band management FPGA solutions for their next-generation GPU products. The role involves developing complex FPGA-based digital designs, defining architecture, writing Verilog/SystemVerilog, and supporting debug and defect resolution. Experience with FPGA, firmware, embedded systems, and various protocols is preferred. | — | 0 |
| Systems Design Engineer Senior Hardware Engineer to join the Data Center Systems Engineering team, focusing on the design, development, and integration of hardware for next-generation AI and accelerated computing platforms, specifically Data Center GPU systems. Responsibilities include leading schematic design, component selection, PCB layout, board bring-up, system integration, validation, and debug efforts for complex hardware issues. The role requires experience with computer architecture, signal integrity, power delivery, and system-level design, with a preference for direct experience in Data Center GPU platforms and AI server architectures. | — | 0 |
| IP Post-Silicon Validation Engineer This role is for an IP Post-Silicon Validation Engineer at AMD. The primary focus is on validating hardware IP for AMD's APU, CPU, Compute, and Discrete Graphics SOC programs. Responsibilities include defining and executing test plans, debugging IP issues, and collaborating with cross-functional teams on pre-silicon activities. The role also involves developing and enhancing validation tools and methodologies. While the company mentions AI and next-generation computing, the core responsibilities of this specific role are in hardware validation and engineering, not direct AI/ML model development or deployment. | — | 0 |
| IP Validation Design Engineer AMD is seeking an IP Validation Design Engineer to join their NBIO Team. The role involves planning, validating, and debugging hardware IP for AMD's SOC programs, including defining test plans, developing automation scripts, debugging issues across various phases (pre-silicon to production), and collaborating with cross-functional teams like DV and Emulation. Experience with digital logic design, ASIC debug, high-speed interfaces (PCIe/CXL), and scripting (Python/Ruby) is preferred. | — | 0 |
| Distinguished Memory PHY Architect AMD is seeking a Distinguished Memory PHY Architect to shape the future of memory interface technology. This role involves defining, architecting, and delivering next-generation Memory PHY solutions in advanced CMOS technologies, influencing technical direction and guiding critical design decisions for future SoCs. The position focuses on deep technical ownership and architectural influence without requiring people management. | — | 0 |
| RTL Design Lead - IP Design This role is for an RTL Design Lead at AMD, focusing on front-end design and integration of IP and subsystems for computing and graphics. It involves leading a team, ensuring first-pass silicon success, and collaborating with various engineering teams. The role requires expertise in RTL design, quality checks, and understanding of SoC design flows, power management, and embedded processors. | — | 0 |
| Graduate Trainee - Product Development Engineer AMD is seeking a Graduate Trainee for their Server Platform Solution Engineering team in Penang, Malaysia. This role involves working on platform designs, validations, and solutions for AMD EPYC systems, including simulation, emulation, and validation during pre-silicon and post-silicon phases. The engineer will help resolve critical issues, test and validate power and performance, and debug server platforms. The role requires a graduate in Electrical & Electronics, Computer Engineering, or Computer Science. | — | 0 |
| CAD Design Engineer CAD Engineer at AMD responsible for developing and supporting next-generation synthesis, place and route (PnR) flows for advanced technology nodes (3nm & 2nm). This role involves automation of PnR flows, collaboration with EDA vendors, and supporting global design teams to achieve optimal power, performance, and area (PPA) for SOCs. | — | 0 |
| Memory/SSD Engineer This role is part of a highly technical silicon validation team responsible for Memory/SSD sub-system. The focus includes DDR5/DDR4/LPDDR5 memory interfaces, Storage/SSD platform-level validation, and close co-work with ODMs, DIMM vendors, and SSD ecosystem partners to ensure robust end-to-end system enablement. | — | 0 |
| Post Silicon Power and Performance Validation Senior Engineer Seeking a Post Silicon Power and Performance Validation Senior Engineer to ensure custom silicon products for gaming platforms meet power and performance targets. Responsibilities include developing testplans, executing studies, and validating/tuning product features post-silicon. | — | 0 |
| Post Silicon Power and Performance Staff Engineer This role focuses on post-silicon power and performance engineering for custom silicon products, ensuring they meet power targets and are optimized for customer use cases. The engineer will collaborate with global teams, develop test plans, execute studies, analyze data, and mentor junior engineers. The role involves improving correlation between pre-silicon projections and post-silicon results, with a focus on CPU, GPU, or APU features. | — | 0 |
