AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| System Firmware Test Development Engineer AMD is seeking a System Firmware Test Development Engineer to join their firmware validation team. The role involves shaping firmware validation across pre-silicon and post-silicon environments by building scalable, automation-ready test solutions. Responsibilities include defining test strategies, designing end-to-end test flows, building automation-ready tests, analyzing requirements, executing tests, debugging failures, and contributing to simulation environments and test infrastructure improvements. The role emphasizes collaboration with firmware architects and SoC design teams, with a focus on low-level system behavior and building reliable test solutions. While AI-assisted tooling is mentioned, the core of the role is firmware validation for CPUs and GPUs. | — | 0 |
| Technical Release Lead (Data Center GPU) This role is for a Release Manager at AMD, focusing on the Data Center GPU product line. The primary responsibilities include feature planning, roadmap alignment, and managing the bug triage process to ensure timely resolution of defects. The role also involves coordinating software releases across multiple business units and driving continuous improvement of release processes. While the company mentions AI and data centers, the core function of this role is release management and process coordination, not direct AI/ML development. |
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| Staff Digital IC Design Engineer This role is for a Staff Digital IC Design Engineer at AMD, focusing on the front-end digital design flow for RF data converters and digital signal processing within advanced mixed-signal environments. Responsibilities include architecture specification, RTL design and optimization, verification, and synthesis, with a technical leadership component. The role requires expertise in SystemVerilog, logic design, and modern IC design flows, and collaboration with analog design, verification, and physical design teams. | — | 0 |
| Lead GPU Formal Verification Engineer Lead GPU Formal Verification Engineer at AMD in Cambridge, UK. This role focuses on driving cutting-edge formal verification techniques for next-generation graphics IP design, defining strategy, methodology, and infrastructure. The ideal candidate will have proven experience in formal verification for complex processors and leadership skills to guide the formal verification team. | — | 0 |
| Program Manager - NPI AMD is seeking an experienced Program Manager for New Product Introduction (NPI) to manage customer programs and product launches. The role involves driving program schedules, budget planning, engineering test solutions, and cross-functional communication to ensure customer satisfaction throughout the product lifecycle. Experience in project management, IC technologies, and manufacturing operations is preferred. | — | 0 |
| Staff Systems Administrator Staff Systems Administrator role at AMD in Bangalore, India, focusing on leading onsite IT operations and end-user support, including AI adoption. Responsibilities include technical support for hardware and software, team leadership, IT project management, and collaboration with other IT teams. Requires strong troubleshooting, multi-platform expertise including AI tools, and people leadership. | — | 0 |
| Staff BMC Firmware Engineer (Server) This role is for a Staff BMC Firmware Engineer responsible for designing, developing, and maintaining firmware for AMD GPU server platforms. The engineer will lead end-to-end firmware development, drive requirement analysis, architect validation scripts, and partner with development teams. Experience with server management standards, OpenBMC, C/C++, Python, and ARM-based SoC architectures is preferred. | — | 0 |
| Programmable Logic Engineer (FPGA Execution) This role focuses on the development, simulation, testing, and debugging of FPGA solutions for server systems. While the company mentions AI and AMD's mission includes AI, this specific role is centered on hardware engineering for FPGAs, not direct AI/ML model development or deployment. | — | 0 |
| Mechanical Engineer Mechanical Engineer at AMD responsible for the infrastructure thermal design and implementation, validation and technology development for AMD Instinct products. This role involves leading the design and development of mechanical and thermal systems for next-generation Instinct products, defining, developing, and validating thermal and mechanical solutions, and collaborating with cross-functional teams. | — | 0 |
| Sr. Product Development Engineer AMD is seeking a Sr. Product Development Engineer to join their Product Engineering organization, focusing on end-to-end test and manufacturing solutions for next-generation processors used in high-performance computing, data center, and enterprise applications. The role involves developing and validating sort hardware, driving test content bring-up, and ensuring quality and yield metrics are met. The ideal candidate will have a strong background in ATE hardware development, preferably Advantest 93K, and possess excellent stakeholder management and communication skills. | — | 0 |
| Hardware Systems Design Engineer - Circuit Board This role is for a Hardware Systems Design Engineer focused on circuit board design for cloud compute server systems. The engineer will lead development from concept to production, collaborate with cross-functional teams, and ensure product quality, performance, and schedule. | — | 0 |
| Firmware Memory Engineer This role focuses on the firmware design and development for high-speed memory interfaces (LPDDR, DDR) and inter-chip IO IPs. It involves pre- and post-silicon development, including RTL, firmware/hardware co-design, and algorithm design for memory PHYs. The responsibilities include firmware design for DDR PHY & DRAM Training, ATE testing, lab bring-up, and optimization for robust links. While the company mentions AI and data centers, the core of this role is in firmware engineering for memory hardware, not AI model development. | — | 0 |
| Software Engineer - FPGA Physical Implementation Software engineer role focused on developing and optimizing algorithms for FPGA physical implementation tools, including placement, routing, and timing. The role involves improving performance, scalability, and quality of results within AMD's FPGA toolchain, with exposure to emerging areas like Network-on-Chip architectures. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD, focusing on RTL design verification for memory and systems IP. Responsibilities include developing testbenches, interacting with architects and designers, creating test plans, and improving productivity through automation. | — | 0 |
| ASIC Design Verification Engineer AMD is seeking an ASIC Design Verification Engineer to join their MSIP UMC team. The role involves all aspects of IP verification, including architecture, test plans, environment development, and closure. The engineer will work on leading-edge DDR technologies for data center and machine learning workloads, contributing to the development of client, server, embedded, graphics, and semi-custom chips. Responsibilities include collaborating with architects, taking ownership of features, developing verification environments using System Verilog/UVM/SystemC, debugging regressions, and deploying verification methodologies. | — | 0 |
| Analog Designer (1 year contract) This role focuses on physical verification of I/O pad rings for AMD products, ensuring integration issues are identified and resolved before final chip integration. Responsibilities include assembling macros/IPs into a database, running verification tools (DRC, LVS, ERC, PERC), and facilitating reviews and waivers. | — | 0 |
| Lead Board Hardware Debug Engineer – Datacenter & AI Platforms Lead Board Hardware Debug Engineer for Datacenter & AI Platforms at AMD. Focuses on complex board-level debug, hardware validation from prototype to production, and system-level integration for high-performance GPU platforms. Requires strong skills in signal integrity, PCB-level debug, and problem-solving across silicon, firmware, and system domains. | — | 0 |
| Board Design & Field Systems Engineer – New Product This role focuses on board design and system engineering for high-performance FPGA/ASIC platforms, involving schematic design, component selection, system architecture, PCB layout, SI/PI optimization, hardware bring-up, complex debugging, DVT execution, root-cause analysis, and technical liaison for field deployments. It requires cross-stack troubleshooting across hardware, firmware, and system software, and collaboration with cross-functional teams and external partners. | — | 0 |
| Sr. Architect Workload Driven Power and Energy Modeling AMD is seeking a technical leader to define and scale workload-driven power and energy modeling across CPU cores and SoC platforms. This role will connect workload behavior to architecture, design, and implementation decisions, improving early insight and enabling better performance-per-watt tradeoffs. The candidate will partner across Methodology, Cores Architecture, SoC Architecture, and Physical Design to build methods that scale across products. | — | 0 |
| Silicon Design Engineering Leader This role is for a Silicon Design Engineering Leader at AMD, focusing on driving SOC design execution, tape-outs, and people management. While the company is involved in AI and data centers, and may use AI for screening, the core responsibilities of this role are in traditional silicon design and engineering leadership, not direct AI/ML model development or deployment. | — | 0 |
| Security Software Engineer Software Engineer focused on application security for AMD's Vivado FPGA toolchain, protecting sensitive software and customer IP against reverse engineering, tampering, and data exposure. The role involves maintaining, improving, and evolving security features within an existing framework, with a strong emphasis on C++ development and practical security principles. | — | 0 |
| Hardware System Level Test (SLT) Product Development Engineer Develops and drives System Level Test (SLT) solutions for new and existing AMD microprocessors used in embedded systems, automotive, robotics, and networking. Responsibilities include test program development, debug, characterization, yield improvement, and collaboration with cross-functional teams to ensure product quality and manufacturing readiness. | — | 0 |
| Automation Software System Design Engineer This role focuses on designing and implementing automation solutions to improve efficiency and quality across AMD's product lines, particularly in computing and graphics. The engineer will develop automation frameworks, integrate tools, and debug system-level issues across hardware and software. While AI tools are mentioned as preferred experience for productivity, the core function is automation engineering for product development, not direct AI model building or research. | — | 0 |
| Staff Finance Analyst Staff Financial Analyst role focused on strategic decision-making, financial modeling, performance analysis, and presenting insights to senior leadership within AMD's Corporate Financial Planning & Analysis (FP&A) team. The role involves supporting annual budgets, quarterly forecasts, and long-term financial plans, partnering with cross-functional teams, and monitoring industry trends. The candidate should be a proactive problem-solver with strong analytical skills and experience with financial analysis tools, including AI tools for finance process improvement. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD in Bangalore, India, focusing on verifying new and existing features for AMD's graphics processor IP. Responsibilities include collaborating with architects and engineers, building verification tests, debugging failures, and analyzing test plans. Requires 8+ years of ASIC Design Verification experience, strong computer architecture knowledge, and proficiency in C++ and assembly language. | — | 0 |
| Senior RTL Design Lead - CPU Team This role is for a Senior RTL Design Lead focused on CPU team at AMD. The responsibilities include RTL design of high performance x86-core ISA features, clock/reset/power features of processor, IP Integration, sub-system level design, architecting and designing power management features, cache, coherency, and design optimization for power efficiency. The role also involves leading the design team, mentoring junior members, and representing AMD to the technical community. The preferred experience includes 11+ years in Digital IP/ASIC design, Verilog RTL development, and familiarity with the full IP design cycle. | — | 0 |
| Principal Cache RTL Design - CPU Team This Principal Cache RTL Design role at AMD focuses on the RTL design of high-performance x86-core ISA features, power management, cache, and coherency. It involves IP integration, sub-system level design, and optimization for power efficiency. The role requires extensive experience in digital IP/ASIC design, Verilog RTL development, and familiarity with the full IP design cycle, including verification, synthesis, and post-silicon validation. Leadership and mentoring of junior engineers are also key responsibilities. | — | 0 |
| Staff Emulation Silicon Design Engineer Staff Emulation Silicon Design Engineer at AMD responsible for realizing advanced designs on emulation platforms, collaborating with various teams to ensure successful silicon delivery. The role involves architecting emulation test benches, developing build flows, and creating tools to enhance efficiency. The candidate will also contribute to methodology improvements, define and execute test plans, lead debug activities, and verify cutting-edge features. The company is exploring AI to enhance emulation execution and workflow efficiency. | — | 0 |
| Senior Synthesis PD Engineer This role is for a Senior Synthesis PD Engineer at AMD, focusing on the physical design and synthesis of complex IPs for computing experiences, including AI and data centers. The engineer will work closely with architecture, IP design, and product engineering teams to optimize PPA (Power, Performance, Area) for these IPs. Responsibilities include synthesis, constraint development, and physical-aware activities like floorplanning and placement. The role requires a strong understanding of the backend design cycle and experience in synthesis/PD/constraints. | — | 0 |
| Senior Product Development Engineer - Wafer Sort Development Develops and validates wafer sort test hardware and solutions for next-generation processors used in high-performance computing, data center, and enterprise applications. Owns the sort hardware solution from development through bring-up, ensuring quality and yield performance. | — | 0 |
| Sr. Systems Design Engineer This role is for a Senior Server Board Design Engineer at AMD, focusing on designing AMD's AI server products. The engineer will work cross-functionally to deliver high-quality designs, conduct design reviews, and debug issues during various phases of product development. Familiarity with board design tools like Cadence's Concept and Allegro is required, along with extensive experience in x86 hardware, MB design, and board/platform-level debugging. | — | 0 |
| Lead verification Engineer - high speed protocol Lead Verification Engineer for Data Center Networking IPs and systems, focusing on high-speed protocols like PCIe, Ethernet, CXL, RoCE/NVMe-oF. Responsibilities include architecting testbenches, developing verification plans, writing SystemVerilog/UVM, and using scripting languages for automation. The role also involves collaboration, leadership, and mentoring. | — | 0 |
| Systems Design Engineer 2 This role is for a Systems Design Engineer at AMD, focusing on the design of AI server boards. The engineer will work cross-functionally to deliver high-quality designs, conduct design reviews, and debug issues throughout the product lifecycle. Experience with server board design, debug processes, and specific design tools like Cadence's Concept and Allegro is required. | — | 0 |
| Synthesis STA Lead This role is for a Senior Member of Technical Staff (SMTS) Silicon Design Engineer in the NBIO IP Physical Aware group at AMD. The primary responsibilities involve synthesis, Static Timing Analysis (STA), constraint development, and physical-aware activities like floorplanning and placement. The role also includes leading junior team members. While the company mentions AI and data centers, the core responsibilities of this specific role are in silicon design and verification, not AI/ML model development or deployment. | — | 0 |
| Senior Design Verification Engineer Senior Design Verification Engineer role focused on planning, building, and executing verification of wired networking IP features. Responsibilities include collaborating with architects and engineers, building test plans, writing and debugging directed and random verification tests, and reviewing coverage metrics. Requires proficiency in IP level ASIC verification, UVM, and SystemVerilog. | — | 0 |
| Senior Physical Verification Engineer (Full-Chip/SoC) AMD is seeking a Senior Physical Verification Engineer to join their Server SOC PD group. This role will be responsible for full-chip Physical Verification signoff (DRC/LVS/ERC/DFM/Antenna/PERC) and methodology ownership on advanced nodes, partnering cross-functionally to ensure tapeout-quality delivery. The engineer will work with cutting-edge designs and solve critical physical verification issues. | — | 0 |
| IP/SOC Verification with power management Engineer This role is for an IP/SOC Verification Engineer with a focus on power management features for Server SOCs. Responsibilities include developing test plans, creating coverage models, building UVM testbenches, verifying power management interactions, debugging issues, and ensuring functional coverage closure. The role also involves participating in architecture reviews and supporting post-silicon validation. | — | 0 |
| Commercial Sales Account Manager This role is for a Sr Commercial Sales Account Manager responsible for building AMD's commercial systems channel business, focusing on PCs, servers, and professional graphics. The role involves business development with partners, evangelizing AMD technology, building sales programs, enabling sales teams, and managing executive relationships. | — | 0 |
| Program Manager Program Manager at AMD responsible for driving the schedule, logistics, and overall program success of a product engineering team focused on AMD Instinct Accelerators. The role involves managing product deliverables, schedules, cross-functional activities, pre-silicon planning, customer sample execution, and high-volume manufacturing readiness. It requires collaboration with various internal organizations and geographically distributed teams. | — | 0 |
| Test Engineer This role is for a Test Engineer at AMD, focusing on the full product life cycle of boards and systems, including pre-silicon, new product introduction (NPI), and production phases. Responsibilities include developing automated test equipment, debugging hardware and software issues, analyzing data for device performance, and driving yield improvement and cost reduction in mass production. The role involves close collaboration with cross-functional teams, vendors, and leading engineering teams to guide GPU and datacenter products from NPI to mass production. Experience with hardware troubleshooting, common test equipment, Linux environments, and scripting (Python) is preferred. The role is based in Hsinchu, Taiwan. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD, focusing on verifying PCI Express designs using UVM and developing test plans for next-generation products. The role involves all aspects of ASIC design stages, including testbench development, test case writing, coverage analysis, and debugging. | — | 0 |
| Strategic Business Finance Manager This role is a finance manager position supporting AMD's AI networking and systems business. The manager will partner with business leadership to drive financial ownership across product lines, strategic deals, and P&L performance, influencing investment, pricing, and scaling in AI markets. Responsibilities include financial planning, deal analysis, business case development, and reporting. | — | 0 |
| Fellow - FPGA architecture Seeking a Fellow Architect to define and drive next-generation architecture for AMD’s adaptive FPGA devices, focusing on configuration, readback, and Partial Reconfiguration (PR). This role involves shaping the long-term vision for bitstream architecture, configuration flows, runtime reconfiguration, debug observability, and system integration, translating customer requirements across various domains into differentiated FPGA capabilities. | — | 0 |
| Manager Software Development Manager of Software Development at AMD, focusing on leading a team to develop innovative software features, bring up new products, and improve existing software quality for internal and external customers. The role involves project planning, software design, development, verification, release, team management, and cross-functional collaboration. Experience in embedded programming, C/C++, operating systems, and complex system software product delivery is preferred. | — | 0 |
| Senior Mechanical Product Engineer Senior Mechanical Product Engineer at AMD, focusing on the manufacturing readiness and production execution of Data Center GPU products. This role acts as a technical interface between design engineering and manufacturing, ensuring hardware can be correctly built, inspected, and tested at scale. Responsibilities include translating design intent into production processes, debugging issues, and driving corrective actions across cross-functional teams and external partners. | — | 0 |
| IT Onsite Support Administrator This role provides IT support for employees and contractors, focusing on client technology and audio-visual services. Responsibilities include first and second level support, laptop imaging and deployment, IT onboarding, incident management, and project support. Familiarity with AI tools like CoPilot and Claude is desired. | — | 0 |
| Post-Silicon Full-Chip Validation Engineer This role is for a Post-Silicon Full-Chip Validation Engineer at AMD, focusing on validating critical technologies for AMD EPYC data center CPUs that power AI and cloud workloads. The engineer will use agentic AI to develop validation test plans and workloads, debug issues, and contribute to validation infrastructure. The role requires experience in CPU/SoC post-silicon validation, programming skills (C/C++, Python), and familiarity with agentic AI concepts and tools. | — | 0 |
| Systems Power Design Engineer This role is for a Systems Design Engineer at AMD, focusing on developing and implementing System Power Modeling methodologies and frameworks. The engineer will work on diverse system architectures, analyze power impact, and drive technical innovation in product development and validation. The role requires programming/scripting skills and experience with system architecture and debug. | — | 0 |
| DDR Lead Verification Engineer This role is for a Lead Verification Engineer at AMD, focusing on planning, building, and executing verification for Memory Controller IP. It involves collaborating with architects and hardware engineers, building test plans, writing and debugging verification tests, and ensuring coverage requirements are met. Experience with memory controllers and ASIC verification is preferred. | — | 0 |
| Customer Debug Lead Customer Debug Lead at AMD, focusing on enabling successful deployment of AMD server platforms by providing technical collateral, debugging, and solutions to customers. The role involves hardware/software platform design, system architecture, and direct customer engagement for issue resolution. | — | 0 |