Currently tracking 56 active AI roles, down 27% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Facilities Operations Manager Operations Manager role focused on leading diverse operational teams to ensure efficiency, productivity, and alignment with company goals within a manufacturing or facilities context. Responsibilities include day-to-day operations management, data analysis for improvement, cross-functional collaboration, resource allocation, stakeholder relationship management, team leadership, strategic planning, KPI monitoring, and ensuring compliance with regulations and policies. | — | 0 |
| Business Human Resources Partner This role is for a Business Human Resources Partner supporting manufacturing and advanced packaging organizations. The responsibilities include building relationships, driving employee relations, organizational development, learning, inclusion, labor relations, and HR processes. The role requires experience in employee relations, HR basics, and Microsoft Office, with preferred experience in leadership development, coaching, organization diagnosis, design, Workday, and manufacturing environments. | — |
| 0 |
| Senior RTL Design Engineer Senior RTL Design Engineer role focused on developing Intel's next-generation microprocessors. Responsibilities include defining, designing, and implementing CPU architecture and microarchitecture features, developing logic design and RTL coding, optimizing designs for power, performance, area, and timing, and collaborating with cross-functional teams. Requires expertise in RTL design using Verilog/System Verilog, low-power design methods, and scripting languages. | — | 0 |
| Firmware Architect Firmware Architect role at Intel focusing on designing and developing embedded software solutions, emphasizing security and performance. Responsibilities include defining architectural frameworks, translating requirements, developing algorithms, leading vulnerability assessments, and collaborating with engineering teams on implementation and new technology adoption. Requires strong C/low-level Linux driver experience and firmware architecture/system-level design. | — | 0 |
| Design Verification Engineer This role focuses on the functional verification of CPU logic to ensure design meets specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing verification plans, running system simulation models, debugging issues, and collaborating with design and architecture teams. The role requires a Bachelor's or Master's degree in Electrical/Computer Engineering with relevant experience in Design Verification methodologies (UVM, System Verilog) and Pre-silicon verification. | — | 0 |
| Construction Project Engineer (Civil, Structural, Architectural) Construction Project Engineer (Civil, Structural, Architectural) at Intel, focusing on the design and engineering of manufacturing and cleanroom projects, specifically tool installation for semiconductor manufacturing equipment. The role involves providing engineering solutions to meet cost, schedule, and productivity targets, collaborating with various stakeholders, and driving safety culture. Requires a Bachelor's or Master's degree in civil or structural engineering with significant experience in technical facilities and equipment installation, and Professional Engineer registration. | — | 0 |
| Compiler Engineer Compiler Engineer at Intel working on C/C++/DPC++/Fortran compilers and LLVM. The role involves feature development, defect resolution, performance optimization, and conducting experiments for general and domain-specific languages targeting Intel CPUs. Collaboration with hardware design teams, other companies, and open-source communities is expected. | — | 0 |
| Network Systems and Solutions Engineer - Intern Internship role focused on system software engineering, including firmware, drivers, operating systems, and middleware. Responsibilities involve design, development, validation, cross-stack optimization, and reference platform development for Intel platforms. Requires proficiency in C, C++, Python, or Java, and understanding of OS architecture. Preferred qualifications include exposure to ML/AI tools and GenAI/LLM. | — | 0 |
| Quality Engineering Manager-Assembly Packaging Testing Manufacturing This role is for a Quality Engineering Manager in Assembly Packaging Testing Manufacturing (APTM) at Intel. The manager will be responsible for end-to-end manufacturing quality leadership across various processes and sites in Arizona, Oregon, and New Mexico. Key responsibilities include leading Quality Program Managers and Engineers, driving In Factory Quality programs, adapting quality systems for advanced packaging, managing supplier improvement programs, leading Quality Review Boards (QRBs), and ensuring world-class Quality KPIs. The role requires strong cross-functional leadership, experience with major quality excursions, and a deep understanding of semiconductor manufacturing processes. | — | 0 |
| Senior Design Verification Engineer- Mixed Signal IP Senior Design Verification Engineer for Mixed Signal IP at Intel, focusing on functional verification of mixed signal logic components, developing IP verification plans, test benches, and verification environments. Responsibilities include executing verification plans, running system simulation models, debugging issues in the presilicon environment, and collaborating with digital and analog architects, RTL developers, and physical design teams. Requires BS/MS/PhD in Engineering with significant experience in design verification, System Verilog, and OVM/UVM. | — | 0 |
| Software Application Development Engineer Software Applications Development Engineer to create full stack integrated software solutions for new product introduction workflows management, execution readiness and controls, build readiness and logistics capabilities, and Design of Experiments (DOE) planning applications. The role involves the complete software project lifecycle, working with stakeholders from Assembly Test Technology Development (ATTD) and Logic Technology Dev (LTD) Fabs. | — | 0 |
| Module Development Engineer Module Development Engineers at Intel lead scientific research for semiconductor manufacturing, focusing on developing and optimizing processes, materials, and equipment for innovative device architectures. This role involves feasibility studies, roadmapping, and collaboration with suppliers to drive technology development for both current high-volume manufacturing and future products. The position requires a strong background in semiconductor processing, device physics, and materials science, with experience in areas like ALD, CVD, etch, and metrology. | — | 0 |
| Director, Business Development Director of Business Development for Intel's Infrastructure Processing Units (IPUs) and Foundational Network Interface Controller (FNIC) portfolio, focusing on Hyperscale, Neo-Cloud, and Enterprise segments. The role involves driving platform design wins, ecosystem partnerships, and revenue growth by positioning Intel's networking silicon and software solutions for AI, cloud, and data center transformation. Responsibilities include developing business strategies, managing revenue pipelines, establishing executive relationships, leading co-design engagements, partnering with ecosystem players, conducting market analysis, and influencing product roadmaps. | — | 0 |
| Substrate Supplier Enablement Engineer This role focuses on enabling new manufacturing capacity for advanced packaging suppliers by leading substrate supplier development and qualification activities. The engineer will drive technical enablement, manage readiness milestones, and collaborate with cross-functional teams and suppliers on various substrate technologies and processes. | — | 0 |
| Manufacturing Quality and Reliability Engineer This role focuses on ensuring the quality and reliability of manufactured products and processes, owning manufacturing ramps, specifying inspection and testing, and driving continuous improvement. It involves analyzing data, including structured and unstructured data using statistics and machine learning, to disposition products and systems. The role also handles excursion management, change control, and supplier improvement, and responds to customer-reported issues. | — | 0 |
| CPU Performance Architect This role focuses on CPU performance architecture, developing and optimizing CPU logic for power, performance, and area. Responsibilities include defining CPU architecture specifications, modeling performance and power, analyzing bottlenecks, developing tests, and collaborating with engineering teams. Requires a degree in a related field and experience with C++. | — | 0 |
| Server Architect This role focuses on developing and driving end-to-end architectural specifications for CPUs, influencing technical direction, and ensuring leadership in performance, power efficiency, and scalability. Responsibilities include defining hardware features, evaluating tradeoffs, conceptualizing architectural innovations, developing new instructions, modeling performance and power, creating tests and simulations, and collaborating with cross-functional teams. | — | 0 |
| Test Module Engineer Test Module Engineer at Intel in Malaysia responsible for owning and optimizing high-volume manufacturing equipment and processes for integrated circuits. This role involves testing, implementing modifications, ensuring quality and cost goals, and participating in technology transfer to global sites. Requires engineering degree, hardware/software skills, analytical abilities, and experience with statistical data analysis. | — | 0 |
| Senior Middleware Development Engineer Senior Middleware Development Engineer to join a communication runtimes team, developing and optimizing libraries like Intel SHMEM, Intel MPI, MPICH, and Intel oneCCL. The role involves working with the latest Intel GPUs and CPUs, collaborating with scientists and engineers on supercomputers, and improving scientific computing and machine learning. Requires understanding of communication stacks, strong analytical skills, and excellent communication. | — | 0 |
| GPU IP Engineering Program Manager This role is for a GPU IP Engineering Program Manager at Intel, responsible for supporting the General Manager and staff in the development, integration, and execution of GPU IP. The position involves understanding the state of IP development, managing staff operations, driving cross-team projects, and ensuring effective operating rhythms. It requires strong technical fluency in Intel's technologies and engineering processes, as well as excellent program management and communication skills. | — | 0 |
| Package Design Rule Owner (DRO) Seeking an experienced Package Design Rule Owner (DRO) to define, validate, and deploy design rules for package substrate design, collaborating with product design, manufacturing, and assembly teams to ensure competitive product designs that meet cost and manufacturability requirements. The role involves working from early technology stages through product design tape out, driving a consistent Design Rule strategy and a forward-looking roadmap, and interacting with cross-disciplinary stakeholders, external suppliers, and customers. | — | 0 |
| CPU Verification Engineer CPU Design Verification Engineer responsible for ensuring the functional accuracy and performance of next-generation processor designs by developing and executing verification plans, building UVM-based testbenches, running simulations, and debugging issues in the pre-silicon environment. | — | 0 |
| Foundry Automation Software Application Engineer Software Application Engineer for Intel's Foundry Automation group, focusing on designing and developing factory automation systems (MES, PAC, scheduling) and optimizing manufacturing processes. The role involves integrating advanced production technologies and collaborating with cross-functional teams, utilizing technologies like machine learning and optimization algorithms. Requires strong database development, .NET/C# experience, and problem-solving skills. | — | 0 |
| Memory Circuit Design Engineer Memory Circuit Design Engineer at Intel, focusing on developing and optimizing embedded memory designs on advanced CMOS process technologies. Responsibilities include pathfinding, PPA optimization, layout, circuit innovation, and pre-Si/post-Si validation. | — | 0 |
| Firmware Validation Engineer Firmware Validation Engineer at Intel, focusing on defining validation strategies, developing automated test frameworks (Python/pytest), validating low-level embedded features, and performing root-cause analysis for pre-silicon and post-silicon environments. Requires strong embedded systems fundamentals, test automation proficiency, and debugging skills. | — | 0 |
| Chassis IP Design Engineer Seeking an experienced Logic Design engineer for the Intel Chassis Group to deliver component and foundation IPs for SoC chassis. Responsibilities include logic design of routers, switches, arbiters, and protocol conversion bridges, with a focus on high-performance data and control planes. Familiarity with AMBA/CXL protocols and concepts like QoS, access control, and RAS is desired. Experience with AI to assist logic design is a plus. | — | 0 |
| GPU Software Development Engineer Intel is seeking GPU Software Development Engineers to develop software solutions for Media and Video acceleration on Intel's graphics architecture. The role involves developing cross-OS software for encode, decode, and processing, optimizing performance, and creating tools and infrastructure for next-generation GPU advancements. Responsibilities span the entire Intel Media SW stack, from drivers to application layer, including tools, infrastructure, and pre-Si enabling. | — | 0 |
| Back End Cloud Software Developer Experienced Full Stack Cloud Software Developer with a strong backend orientation to design, build, and maintain software components and tools used across the organization. Will work on complex software systems, collaborate with multiple teams, and contribute across the full software development lifecycle. | — | 0 |
| Firmware Development Engineer Develops firmware for Infrastructure Processing Units (IPUs) / Smart-NICs, which offload tasks from host CPUs for cloud data centers. The role involves collaborating with various teams, analyzing code, gathering requirements, developing algorithms, writing and debugging firmware on pre-silicon and silicon platforms, and troubleshooting complex issues. Additionally, the role will leverage AI tools to improve development and validation efficiency. | — | 0 |
| CPU RTL Design Engineer This role is for a CPU Logic Design Engineer responsible for designing and optimizing logic for Intel's processors. The engineer will develop RTL code, define architecture and microarchitecture features, and ensure design integrity for physical implementation. The role requires expertise in Verilog/System Verilog, modern energy-efficient design methods, and scripting languages. | — | 0 |
| Experienced Logic Design Engineer Experienced Logic Designer to join the Ethernet Silicon Engineering Group, focusing on developing state-of-the-art IPU and NIC products for Data Centers. The role involves leading full development cycles from architecture to tape-out, collaborating with various teams, and working with the latest silicon technologies. | — | 0 |
| Senior CPU Pre-Silicon Verification Engineer Senior CPU Pre-Silicon Verification Engineer role focused on leading and executing functional verification of CPU logic using UVM and System Verilog. Responsibilities include developing test benches, analyzing power and timing, debugging issues, and collaborating with cross-functional teams. The role requires experience in digital logic design and scripting languages, with preferred experience in AI agents in verification. | — | 0 |
| CPU Formal Verification Engineer This role focuses on the formal verification of CPU designs, ensuring the quality and reliability of Intel's cutting-edge CPU technologies. The engineer will develop strategies, create abstraction models, collaborate with design teams, and debug issues. While the role mentions AI and machine learning systems as applications of the CPUs, the core function is CPU verification, not AI/ML model development. | — | 0 |
| Senior CPU Circuit Design Engineer Senior CPU Circuit Design Engineer responsible for designing, developing, and building custom digital circuits for CPUs, including memory and caches. This involves floorplanning, circuit design, schematic entry, simulation, and verification to optimize for power, performance, area, timing, and yield. The role also includes creating DFT models, developing memory test tools, and optimizing CPU circuits for low power and performance. Requires a Master's or PhD in Electrical Engineering or related STEM field with significant experience in CMOS circuit design, VLSI, and memory design. | — | 0 |
| SoC Power Thermal Performance Val and Opt Engineer (Temporary Position) This role is for a pre-silicon power and performance engineer responsible for validating new and existing features for Intel's next-generation CPU products. The engineer will develop validation strategies, create test content, debug issues, and report results using simulation and emulation environments, focusing on power-performance correlation. | — | 0 |
| Quantum Computing Measurement Engineer This role is for a PhD-level Quantum Device Measurement Engineer focused on characterizing silicon spin qubits at millikelvin temperatures using electrical measurements and quantum circuit computations. The position involves designing experiments, analyzing device performance, and collaborating to advance Intel's quantum computing roadmap, operating within a research environment focused on semiconductor-based quantum systems. | — | 0 |
| Pre-Silicon Verification Engineer This role focuses on the pre-silicon verification of CPU logic to ensure designs meet specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing these plans using system simulation models, debugging issues in the presilicon environment, and collaborating with design and architecture teams. The role requires experience with Design Verification and Validation methodologies, UVM, System Verilog, and EDA tools. | — | 0 |
| Sr. Substrates Development and Ramp Engineer Senior engineer focused on supply chain and logistics strategy, process and quality improvements, cost control, production yield optimization, and supplier management within Intel's semiconductor manufacturing environment. Requires deep knowledge of substrate manufacturing, raw materials, packaging technologies, and quality systems. | — | 0 |
| Sr. Substrates Development and Ramp Engineer This role focuses on process and quality improvements within Intel's supply chain and logistics strategy, specifically in the semiconductor manufacturing environment. The engineer will define inspection methodologies, conduct cost and yield studies, explore emerging technologies, and manage supplier relationships to ensure product and commodity performance compliance. The role requires strong analytical problem-solving, supplier management, and quality management skills, with in-depth knowledge of substrate manufacturing processes and operations. | — | 0 |
| Substrates Material Engineer This role focuses on supply chain engineering, optimizing global supply chain strategy, implementing process improvements, and ensuring quality, reliability, and efficiency. It involves collaborating with teams, exploring emerging technologies, defining inspection methodologies, monitoring trends, driving supplier performance, and managing quality excursions. | — | 0 |
| Senior Out-of-Order CPU Architect Senior Out-of-Order CPU Architect at Intel, responsible for defining and driving end-to-end CPU architecture specifications, exploring novel architectures, and influencing cross-functional roadmaps. Requires extensive experience in high-performance CPU design and out-of-order pipeline architecture. | — | 0 |
| Senior CPU Performance Architect This role focuses on designing and specifying CPU microarchitectures, modeling their performance and power characteristics, and collaborating with cross-functional teams to ensure designs meet stringent requirements. It involves developing end-to-end specifications, evaluating tradeoffs, and debugging performance issues from RTL to silicon. | — | 0 |
| Account Executive Saudi Government and Public Sector Account Executive for Intel in Saudi Arabia, focusing on the Government and Public Sector. The role involves growing Intel's business, building sales initiatives aligned with Saudi's 2030 vision to accelerate digital transformation and establish Saudi Arabia as an AI hub, and meeting sales KPIs. Responsibilities include developing customer base strategies, creating business partnerships, managing account plans and stakeholder relationships, and driving sales strategies. Requires experience working with government organizations, understanding the public sector business segment in Saudi Arabia, strong sales and communication skills, and native Arabic fluency. | — | 0 |
| Lead CPU Design Engineer Lead CPU Design Engineer at Intel, responsible for designing and developing logic architecture for CPUs, including RTL coding, simulation, optimization, and collaboration on architecture and microarchitecture features. Supports SoC customers for high-quality integration. | — | 0 |
| Senior Wet Etch Manufacturing Development Engineer Senior Wet Etch Manufacturing Development Engineer role at Intel, focusing on advancing next-generation semiconductor manufacturing processes. Responsibilities include leading process development, optimization, feasibility studies, technology roadmapping, and driving defect reduction and yield improvement in collaboration with internal teams and external suppliers. Requires experience in semiconductor manufacturing, process development, DOE, statistical process control, and root-cause analysis. | — | 0 |
| Design Engineer – AI SoC Development Develops logic design, RTL coding, and simulation for AI SoC development, focusing on power, performance, area, and timing goals. Integrates IP blocks, performs quality checks, and supports silicon bring-up. | — | 0 |
| Design Engineer – AI SoC Development This role is for an RTL Design Engineer focused on developing logic design, RTL coding, and simulation for AI System-on-Chip (SoC) development. The engineer will integrate IP blocks, define architecture and microarchitecture, and optimize logic for power, performance, area, and timing. The role involves close collaboration with verification teams, physical design teams, and IP providers, and supports silicon bring-up and validation. While the products power AI applications, the core craft of the role is hardware design (RTL, SoC integration, timing closure) rather than AI/ML model development or deployment. | — | 0 |
| WLA Yield Analysis Systems Eng This role focuses on adapting, developing, deploying, and sustaining yield analysis software solutions for advanced packaging in semiconductor manufacturing. It involves driving defect data pipeline workflows, collaborating with various engineering teams, and contributing to system integration projects. The role requires a strong foundation in data analysis, programming (Python), and experience with defect and yield analysis applications, with a preference for AI/ML experience in Automated Defect Classification. | — | 0 |
| Test Module Development Engineer The Test Module Development Engineer role at Intel focuses on developing and enabling test technologies for advanced semiconductor packaging, particularly for high-performance computing and AI applications. Responsibilities include test process development, equipment modification, and feasibility studies, with a focus on scaling packaging density and improving performance. The role requires experience in electrical test, statistical controls, and FMEA/DOE methodologies. | — | 0 |
| CPU Physical Design Automation Engineer This role focuses on the automation of CPU physical design, including synthesis, place and route, and signoff analysis. It involves developing and debugging tools and flows for high-performance CPUs, working with EDA vendors, and scripting for design automation. The role requires experience in hardware design, VLSI, and scripting languages like Python, Perl, or Tcl. | — | 0 |