Intel

Seeking an experienced Package Design Rule Owner (DRO) to define, validate, and deploy design rules for package substrate design, collaborating with product design, manufacturing, and assembly teams to ensure competitive product designs that meet cost and manufacturability requirements. The role involves working from early technology stages through product design tape out, driving a consistent Design Rule strategy and a forward-looking roadmap, and interacting with cross-disciplinary stakeholders, external suppliers, and customers.

CPU Design Verification Engineer responsible for ensuring the functional accuracy and performance of next-generation processor designs by developing and executing verification plans, building UVM-based testbenches, running simulations, and debugging issues in the pre-silicon environment.

Software Application Engineer for Intel's Foundry Automation group, focusing on designing and developing factory automation systems (MES, PAC, scheduling) and optimizing manufacturing processes. The role involves integrating advanced production technologies and collaborating with cross-functional teams, utilizing technologies like machine learning and optimization algorithms. Requires strong database development, .NET/C# experience, and problem-solving skills.

Memory Circuit Design Engineer at Intel, focusing on developing and optimizing embedded memory designs on advanced CMOS process technologies. Responsibilities include pathfinding, PPA optimization, layout, circuit innovation, and pre-Si/post-Si validation.

Firmware Validation Engineer at Intel, focusing on defining validation strategies, developing automated test frameworks (Python/pytest), validating low-level embedded features, and performing root-cause analysis for pre-silicon and post-silicon environments. Requires strong embedded systems fundamentals, test automation proficiency, and debugging skills.

Seeking an experienced Logic Design engineer for the Intel Chassis Group to deliver component and foundation IPs for SoC chassis. Responsibilities include logic design of routers, switches, arbiters, and protocol conversion bridges, with a focus on high-performance data and control planes. Familiarity with AMBA/CXL protocols and concepts like QoS, access control, and RAS is desired. Experience with AI to assist logic design is a plus.

Intel is seeking GPU Software Development Engineers to develop software solutions for Media and Video acceleration on Intel's graphics architecture. The role involves developing cross-OS software for encode, decode, and processing, optimizing performance, and creating tools and infrastructure for next-generation GPU advancements. Responsibilities span the entire Intel Media SW stack, from drivers to application layer, including tools, infrastructure, and pre-Si enabling.

Experienced Full Stack Cloud Software Developer with a strong backend orientation to design, build, and maintain software components and tools used across the organization. Will work on complex software systems, collaborate with multiple teams, and contribute across the full software development lifecycle.

Develops firmware for Infrastructure Processing Units (IPUs) / Smart-NICs, which offload tasks from host CPUs for cloud data centers. The role involves collaborating with various teams, analyzing code, gathering requirements, developing algorithms, writing and debugging firmware on pre-silicon and silicon platforms, and troubleshooting complex issues. Additionally, the role will leverage AI tools to improve development and validation efficiency.

This role is for a CPU Logic Design Engineer responsible for designing and optimizing logic for Intel's processors. The engineer will develop RTL code, define architecture and microarchitecture features, and ensure design integrity for physical implementation. The role requires expertise in Verilog/System Verilog, modern energy-efficient design methods, and scripting languages.

Experienced Logic Designer to join the Ethernet Silicon Engineering Group, focusing on developing state-of-the-art IPU and NIC products for Data Centers. The role involves leading full development cycles from architecture to tape-out, collaborating with various teams, and working with the latest silicon technologies.

This role is for a pre-silicon power and performance engineer responsible for validating new and existing features for Intel's next-generation CPU products. The engineer will develop validation strategies, create test content, debug issues, and report results using simulation and emulation environments, focusing on power-performance correlation.

This role is for a PhD-level Quantum Device Measurement Engineer focused on characterizing silicon spin qubits at millikelvin temperatures using electrical measurements and quantum circuit computations. The position involves designing experiments, analyzing device performance, and collaborating to advance Intel's quantum computing roadmap, operating within a research environment focused on semiconductor-based quantum systems.

This role focuses on the pre-silicon verification of CPU logic to ensure designs meet specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing these plans using system simulation models, debugging issues in the presilicon environment, and collaborating with design and architecture teams. The role requires experience with Design Verification and Validation methodologies, UVM, System Verilog, and EDA tools.

Senior engineer focused on supply chain and logistics strategy, process and quality improvements, cost control, production yield optimization, and supplier management within Intel's semiconductor manufacturing environment. Requires deep knowledge of substrate manufacturing, raw materials, packaging technologies, and quality systems.

This role focuses on process and quality improvements within Intel's supply chain and logistics strategy, specifically in the semiconductor manufacturing environment. The engineer will define inspection methodologies, conduct cost and yield studies, explore emerging technologies, and manage supplier relationships to ensure product and commodity performance compliance. The role requires strong analytical problem-solving, supplier management, and quality management skills, with in-depth knowledge of substrate manufacturing processes and operations.

This role focuses on supply chain engineering, optimizing global supply chain strategy, implementing process improvements, and ensuring quality, reliability, and efficiency. It involves collaborating with teams, exploring emerging technologies, defining inspection methodologies, monitoring trends, driving supplier performance, and managing quality excursions.

Account Executive for Intel in Saudi Arabia, focusing on the Government and Public Sector. The role involves growing Intel's business, building sales initiatives aligned with Saudi's 2030 vision to accelerate digital transformation and establish Saudi Arabia as an AI hub, and meeting sales KPIs. Responsibilities include developing customer base strategies, creating business partnerships, managing account plans and stakeholder relationships, and driving sales strategies. Requires experience working with government organizations, understanding the public sector business segment in Saudi Arabia, strong sales and communication skills, and native Arabic fluency.

Lead CPU Design Engineer at Intel, responsible for designing and developing logic architecture for CPUs, including RTL coding, simulation, optimization, and collaboration on architecture and microarchitecture features. Supports SoC customers for high-quality integration.

Senior Wet Etch Manufacturing Development Engineer role at Intel, focusing on advancing next-generation semiconductor manufacturing processes. Responsibilities include leading process development, optimization, feasibility studies, technology roadmapping, and driving defect reduction and yield improvement in collaboration with internal teams and external suppliers. Requires experience in semiconductor manufacturing, process development, DOE, statistical process control, and root-cause analysis.

Develops logic design, RTL coding, and simulation for AI SoC development, focusing on power, performance, area, and timing goals. Integrates IP blocks, performs quality checks, and supports silicon bring-up.

This role is for an RTL Design Engineer focused on developing logic design, RTL coding, and simulation for AI System-on-Chip (SoC) development. The engineer will integrate IP blocks, define architecture and microarchitecture, and optimize logic for power, performance, area, and timing. The role involves close collaboration with verification teams, physical design teams, and IP providers, and supports silicon bring-up and validation. While the products power AI applications, the core craft of the role is hardware design (RTL, SoC integration, timing closure) rather than AI/ML model development or deployment.

This role focuses on adapting, developing, deploying, and sustaining yield analysis software solutions for advanced packaging in semiconductor manufacturing. It involves driving defect data pipeline workflows, collaborating with various engineering teams, and contributing to system integration projects. The role requires a strong foundation in data analysis, programming (Python), and experience with defect and yield analysis applications, with a preference for AI/ML experience in Automated Defect Classification.

The Test Module Development Engineer role at Intel focuses on developing and enabling test technologies for advanced semiconductor packaging, particularly for high-performance computing and AI applications. Responsibilities include test process development, equipment modification, and feasibility studies, with a focus on scaling packaging density and improving performance. The role requires experience in electrical test, statistical controls, and FMEA/DOE methodologies.

This role focuses on the automation of CPU physical design, including synthesis, place and route, and signoff analysis. It involves developing and debugging tools and flows for high-performance CPUs, working with EDA vendors, and scripting for design automation. The role requires experience in hardware design, VLSI, and scripting languages like Python, Perl, or Tcl.

This role focuses on formal verification of IP and/or SoC microarchitecture using model checking and equivalence checking algorithms. The engineer will create verification plans, abstraction models, develop formal proofs, and maintain verification infrastructure. Collaboration with RTL developers and architects is key.

This role is for a Board and System Debug Engineer at Intel, focusing on supporting ODM operations during NPI and HVM ramp. Responsibilities include providing debug support, delivering technical training, testing production failed parts, managing documentation, and collaborating with cross-functional teams. Requires a degree in Electrical/Electronic/Computer Engineering or equivalent, with strong debugging skills and familiarity with debug tools. Scripting knowledge (Python) is a plus.

Diploma level contract role for a CPU-SoC Mask Layout Designer at Intel, focusing on the training, design, and development of next-generation SOC/CPU. Responsibilities include creating mask layouts, running verification tools, designing floorplans, and troubleshooting layout issues. Requires a Diploma in Electrical and Electronic Engineering and offers hands-on experience in semiconductor design.

Manufacturing Operations Manager role at Intel in Malaysia, focused on leading teams to ensure factory operations, equipment maintenance, and repair for optimal performance. Responsibilities include managing workflow, responding to issues, collaborating with engineering, and developing long-term strategies for manufacturing capabilities. Requires a Bachelor's degree and 2 years of experience in manufacturing operations, with expertise in semiconductor manufacturing principles and factory floor planning.

Intel is seeking an IP Design Verification Engineer with 6+ years of experience in Pre-Si verification. The role involves developing IP verification plans, test benches, and simulation models to ensure design specifications are met. Responsibilities include debugging issues, collaborating with cross-functional teams, and maintaining verification infrastructure. Requires strong skills in Specman “e” / System Verilog and understanding of verification methodologies.

This role supports management in improving Intel's supply chain and logistics strategy, focusing on process and quality improvements, cost control, production yield, and exploring emerging technologies. The engineer will define material inspection methodology, support product long-range planning, lead supplier selections, perform risk mitigation, establish control standards, monitor KPIs, drive supplier process validation, and manage quality excursions.

Manufacturing Operators at Intel in Malaysia are responsible for performing product manufacturing and assembly tasks, operating equipment, collecting and evaluating operating data, and driving process improvements to meet industry standards and customer specifications. The role involves working in shifts and requires basic computer literacy and problem-solving skills.

Supply Chain Engineer at Intel responsible for developing and executing supply chain strategies, ensuring supplier process and product readiness, and managing supplier relationships to meet cost, quality, availability, technology, and environmental goals within the semiconductor industry.

This role focuses on defining and optimizing power and performance targets for Intel's products, collaborating with various engineering teams. Responsibilities include driving SoC PnP projections, developing power and performance models, and defining targets across development phases. The role requires strong system-level thinking, technical judgment, and leadership skills.

Lead Design Verification Engineer for Intel's Silicon Chassis team, responsible for defining and executing verification strategy for critical chassis and interconnect IP programs. Requires deep DV expertise, protocol and memory subsystem knowledge, and collaboration across design, software, and methodology teams. The role involves leading the development of verification environments, driving functional signoffs, and mentoring engineers. AI-assisted workflows are integrated into daily development.

This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux.

This role is for a Graduate Talent (PDK QA Engineer) within Intel's Design Technology Platform (DTP) organization, focusing on the Process Design Kit (PDK) group. Responsibilities include validating PDK quality for custom design components and developing regression test suites to ensure PDK accuracy across various EDA flows and process nodes. The role requires knowledge of VLSI semiconductor devices, electronic circuits, and familiarity with EDA tools.

Seeking a Graduate Talent Platform Hardware Engineer to support the architecture, bring-up, validation, and execution of platform hardware for test chip and validation programs. Responsibilities include board-level execution, power-on, debug, test plan execution, data collection, and documentation. The role involves collaboration with cross-functional teams and support for sustaining activities.

This role manages a team of engineers responsible for developing, validating, and optimizing Process Design Kits (PDKs) and design methodologies for Intel's advanced process nodes. The focus is on ensuring the quality and robustness of PDK collateral for internal and external design communities, particularly in ASIC EM/IR, ESD PERC, and High Voltage domains. The manager will drive innovation in tools and flows, collaborate with manufacturing and design teams, and conduct root cause analyses for issues.

This role is for a Graduate Talent (PDK QA Engineer) at Intel, focusing on the Quality validation of ASIC Design components within the Design Technology Platform/Process Design Kit (PDK) group. Responsibilities include developing regression test suites, executing them to validate PDK elements like pcells and techfiles, developing layout designs for verification, and developing circuit designs for simulations. The role requires proficiency in programming languages like TCL, Perl, or Python, and Unix/Linux knowledge.

Designs and develops analog and mixed-signal circuits for Intel's Advanced Design Foundational IP Organization, focusing on pathfinding and development of advanced logic, memory, and analog/mixed-signal circuits for Intel's process technology.

Accountant role at Intel in Malaysia, focusing on preparing, analyzing, and validating financial records, ensuring compliance with global financial standards (IFRS, US GAAP), managing auditor interactions, and driving process improvements. Requires proficiency in accounting principles, financial systems (SAP S4, SQL, Power BI), and SOX compliance.

This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux.

This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux.

Lead formal verification efforts for complex CPU designs, developing environments, creating models and properties, analyzing failures, and guiding team members. Requires Master's degree and 8+ years of experience in formal verification, with proficiency in relevant tools and languages.

Lead formal verification efforts for complex CPU designs (i9, i7, i5, Xeon processors). Develop environments, create models and properties, analyze failures, and guide team members. Stay updated on formal verification technologies and develop new methodologies.

Semiconductor Manufacturing Engineer responsible for operational support, process optimization, and new product introduction in a fabrication facility. This role involves analyzing factory metrics, developing manufacturing plans, and collaborating with engineering and automation teams to ensure efficient production and delivery schedules.

Process and Equipment Engineer at Intel in Malaysia, responsible for optimizing high-volume manufacturing equipment and processes for integrated circuit production. This role involves ensuring precision, quality, cost efficiency, and technology scaling, with opportunities for global process transfer and continuous improvement.

Process and Equipment Engineer at Intel in Malaysia, focusing on optimizing high-volume manufacturing equipment and processes for integrated circuits. Responsibilities include testing, defect minimization, implementing process modifications, building capacity, executing maintenance, developing excursion prevention systems, managing equipment installation, and collaborating with cross-functional teams for technology transfer.

This role is for a Graduate Talent (Physical Design Engineer) at Intel, focusing on Foundational IP (FIP) integration QA within the Foundry Technology Development group. The responsibilities include using industry standard tools for RTL to GDS design flow, scripting and automation, developing new IP-level quality checks, and interacting with EDA tool vendors and internal IP development teams. A key aspect involves applying data analytics and AI/ML techniques to optimize processes and improve quality.