Intel

This role is for a DFT Design Engineer at Intel, focusing on Design for Testability (DFT), Design for Debug (DFD), and Design for Validation (DFV) within micro-architecture, RTL design, and validation stages. The engineer will architect and implement DFX strategies, define methodologies, oversee Scan/ATPG, perform yield analysis, and support silicon debug. Responsibilities include RTL coding, integrating DFx sub-IPs, inserting MemoryBIST logic, and collaborating with cross-functional teams for issue analysis and root cause identification. The role also involves pre-silicon validation and post-silicon support for debug capabilities.

Mechanical Engineering Intern to support operation and preventive maintenance of mechanical systems like HVAC, Chiller, OFA, and vacuum systems in industrial and data center environments. Responsibilities include hands-on maintenance tasks and learning about building mechanical systems.

Senior CPU Design Engineer focused on front-end integration and quality assurance across multiple teams and sites. Responsibilities include leading complex subIP integration, static methodology sign-off (CDC, RDC, Lint, low-power), and driving end-to-end integration workflows. Requires strong technical leadership and collaboration skills.

Internship role focused on firmware engineering for Intel Client architecture, contributing to the design, development, validation, and debugging of embedded software for Edge reference platforms. Involves system-level modeling, algorithm development, and hardware-software integration.

Internship role focused on security research for hardware development teams, involving review of designs, threat and vulnerability assessments, and creating proof-of-concepts for security risks in SoCs.

Seeking a Retail Partnership Manager to cultivate relationships with key retail partners, drive product placement, and increase market share for Intel products in Colombia. Responsibilities include developing partnerships, collaborating with sales teams, analyzing market trends, achieving sales targets, and supporting go-to-market campaigns.

Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis.

Experienced Linux Kernel Developer sought for system software engineering team, focusing on x86 architectures, device drivers, and platform integration. Role involves supporting early platform enablement in presilicon and postsilicon environments, collaborating with hardware and software teams, and contributing to upstream Linux kernel subsystems. Requires strong Linux kernel expertise and debugging skills.

This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership.

Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications.

This role manages Intel's CRetail program, focusing on incentive programs for consumer-facing retailers selling Intel CPUs. Responsibilities include budget ownership, sales cycle planning, program operations, and sales data analysis to identify trends and produce performance reports. It requires strong analytical and stakeholder management skills.

Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows.

Internship role focused on supporting SoC (System on Chip) development activities, including learning about functionality, performance, and quality validation. Responsibilities involve assisting with pre-silicon and post-silicon validation plans and execution, using environments like Simics/VP, FPGA, Zebu SLE and HSLE models, and participating in debugging.

This is an internship role focused on the pre-silicon functional logic verification of silicon designs for data centers. The intern will contribute to verification plans, test benches, and environments, working with experienced engineers on validation methodologies, simulation, emulation, and debug. The role involves learning industry-standard verification flows and tools, and collaborating with design and architecture teams.

Develop and validate system software for Intel GPUs, including firmware, device drivers, and APIs. Optimize tools and infrastructure for GPU performance, adapt driver functionality to hardware changes, and debug Linux kernel issues. Contribute to open-source communities by upstreaming patches and coordinating driver enhancements.

Seeking a Python Automation Engineer for pre-silicon validation tools at Intel. Responsibilities include developing automation tools, debugging, performance analysis, supporting validation coverage, and participating in test automation and data analysis. Requires experience in computer architecture, programming, GitHub, and Linux, with familiarity in Python and server/SoC architectures preferred.

Senior Verification Engineer role focused on ASIC/FPGA design verification using UVM, formal methods, and coverage-driven techniques. Responsibilities include defining verification strategy, leading execution, debugging, and mentoring junior engineers. Requires 5+ years of experience in ASIC/FPGA verification.

This role is for a Design Verification Student Worker at Intel, focusing on SoC design and implementation for next-generation SoCs. The candidate will explore and implement new design methodologies that utilize AI engines and modern hardware description languages. Responsibilities include IP to SoC integration, developing automation scripts, debugging digital simulations, and collaborating with design engineers. The role requires pursuing a Master's or PhD in a related field with at least one year remaining, and experience in digital design, programming/scripting, hardware description languages, and pre-Si validation.

This is a student intern position at Intel focused on technical sales enablement. The role involves assisting with technology demonstrations, developing training materials, documenting technical results, and participating in proof-of-concept projects. While the role mentions AI PC and advanced computing solutions, the core responsibilities are sales enablement and technical support, not direct AI/ML development or research.

Analytical Chemistry Technician with Mass Spectrometry experience for trace metal analysis in a clean room laboratory environment. Responsibilities include sample preparation, analysis, maintenance of laboratory equipment, and data reporting in support of manufacturing operations. Requires experience with ICPMS, titration, and chromatography techniques.

Product Development Engineer responsible for evaluating and debugging new test programs, resolving product manufacturability issues, performing data analysis to improve test coverage and yield, and developing support software for test program validation and debug.

Internship role focused on firmware development for Intel silicon products, involving design, development, validation, and debugging of embedded software for domains like BIOS, microcontrollers, and memory systems. Responsibilities include system-level modeling, algorithm development, and hardware-software integration, often under constraints. Collaboration with architects and engineers is expected. The role is for graduate students with strong programming skills (C++, C, Assemble) and experience in firmware or embedded software development.

Intern role focused on Xeon IO performance engineering, involving validation, analysis of KPIs, debugging, and optimization of networks for Intel's AI performance across diverse product segments. Responsibilities include executing performance validation, identifying bottlenecks, supporting customer co-validation, and mitigating single-point-of-failure risks in I/O domains.

This is an intern role focused on supporting and contributing to software development infrastructure and processes, including automation, monitoring, optimization, CI/CD, cloud integration, and containerization. The role involves learning and applying DevOps and SRE concepts within a hybrid cloud environment, with a focus on HPC and storage systems. The candidate will work with various teams to streamline development and release processes.

Student worker role focused on supporting software development infrastructure, automation, monitoring, optimization, CI/CD, cloud integration, containerization, and deployment workflows. Requires active student status in a relevant degree, basic server administration experience, and advanced English.

Entry-level Linux/Android Kernel Engineer role focused on SoC platform development, applying academic knowledge to real-world kernel development, FPGA environments, and industry-standard tools. Involves basic kernel module development, device drivers, and system components with mentorship.

This role focuses on designing, deploying, and maintaining Linux-based infrastructure for large-scale modeling, simulation, and data analysis workflows within Intel's Silicon Architecture group. The engineer will manage CI/CD pipelines, automation, artifact storage, and monitor/improve pipeline performance and observability, working cross-functionally to enhance developer productivity and system scalability.

Software Enabling and Optimization Engineer at Intel responsible for developing software for Intel's customers to enable, validate, and triage the integration of CPUs into their platforms. This role involves collaborating with customers and internal partners to solve critical customer problems, conducting code reviews, analyzing and debugging issues, and providing technical support. The engineer will also contribute to product development by driving application pre-enablement and product hardening, and deliver technical training and collateral to facilitate customer adoption of tools.

Intel is seeking a GPU Design Verification Engineer to ensure the functional accuracy and performance of their GPU architectures. The role involves developing verification plans, test benches, and executing simulations to validate designs, debug issues, and collaborate with cross-functional teams. The position requires experience in System Verilog, UVM, and scripting languages, with a focus on graphics IP verification for integrated, discrete, and AI-enabled platforms.

This role is for a seasoned professional GPU Design Verification Engineer to join an IP team. Responsibilities include planning, designing complex structures, leading design and verification efforts, defining strategy, and architecting testbenches. The role requires expertise in Verilog, System Verilog, UVM, assertion-based verification, and industry standard protocols. Experience with AI tools or advanced process nodes is preferred.

This role focuses on the functional verification of graphics logic components (3D graphics, media, display) within Intel's Data Center Group. The engineer will develop verification plans, test benches, and simulation models to ensure designs meet specifications, debug issues in pre-silicon environments, and collaborate with cross-functional teams to improve verification of complex features. The role requires experience with SystemVerilog, UVM, computer architecture, and ASIC design/verification.

This role involves managing and maintaining a lab environment, deploying automated tests, triaging issues, and performing hardware/software troubleshooting. It also includes designing custom equipment, monitoring tests, performing preventive maintenance, and developing technical documentation. The position requires onsite presence and is a fixed-term opportunity.

This role is for a Module Equipment Technician at Intel in Malaysia, focusing on troubleshooting, maintenance, and calibration of manufacturing equipment. It requires a technical diploma and offers opportunities for fresh graduates. The role involves supporting engineering experiments and data collection within a manufacturing environment.

Intel is seeking a SOC Performance Architect to design and evaluate complex hardware features and structures for the XEON CPU and AI portfolio. Responsibilities include defining, documenting, and testing processes, and identifying/resolving design weaknesses to influence future product architecture. The role requires experience in computer architecture, software engineering, performance analysis, SoC-level development, and proficiency in programming and scripting languages.

Develops and optimizes Intel's oneAPI Collective Communications Library for AI accelerators and GPUs, focusing on performant graph modes and efficient scaling solutions for inference and training. Requires strong C++ and Linux development skills, with experience in multithreaded programming and optimization.

This role focuses on ensuring the testability and manufacturability of integrated circuits, involving testing, validation, and debugging in a manufacturing environment. It also offers involvement in early product development phases for content implementation and validation.

Designs, develops, tests, and debugs software applications, potentially spanning the full application stack (frontend and backend). Utilizes modern software development methodologies, secure coding practices, and follows legal compliance guidelines. Responsibilities include analyzing user stories, writing functional and test code, automating build/deployment, and performing various levels of testing. Also involves SDL tasks, contributing to product documentation, and potentially interacting with end-users for requirements definition.

This Systems and Solutions Engineer role at Intel focuses on the design, development, and integration of complex systems involving software, firmware, board, and silicon components for data centers. The role involves defining system architecture, translating business needs into technical specifications, and leading the implementation of end-to-end technical solutions. Key responsibilities include automating data center infrastructure build-up, provisioning, monitoring, and creating reusable building blocks for management tools. The position requires strong programming skills (Python preferred), deep OS knowledge, experience with IaC tools, and the ability to lead cross-functional teams.

Standard Cell Design Reliability Verification Engineer at Intel, focusing on IR/EM flows, VLSI, and using EDA tools for ASIC designs. Requires expertise in device physics, FinFet characteristics, and Python for automation.

Senior PCB/CAD Layout Engineer to lead the design and delivery of cutting-edge printed circuit board layouts across diverse electrical systems, including both flexible and rigid circuit boards. This role combines technical excellence with strategic impact, directly contributing to Intel's key objectives through innovative PCB design solutions.

This role involves designing, developing, and maintaining Linux kernel features, subsystems, and device drivers. The engineer will optimize kernel performance, debug kernel issues, and contribute to the upstream Linux kernel project. The position requires experience with system software, OS internals, and open-source contributions, with a focus on Intel hardware platforms.

Seeking a Platform Integration Engineer to work with SoC architecture teams, design and develop high-performance networks-on-chip using chassis foundation library components, and coordinate with the foundation IP development team.

This role is for a Facilities Water/Waste Treatment Technician at Intel, responsible for maintaining and improving water systems, conducting sampling and analysis, operating and troubleshooting equipment, and preparing technical reports. It involves collaboration with multidisciplinary teams and adherence to sustainability standards.

CPU Circuit Design Engineer responsible for designing and advancing cutting-edge digital circuits for high-performance CPUs, focusing on power, performance, area, timing, and yield optimization. Responsibilities include floorplanning, circuit design, simulation, verification, signal integrity analysis, and post-silicon analysis.

This role is for an IT Business Operations Manager at Intel, responsible for establishing consistent strategies and practices within Global IT. The manager will partner with segment leadership to ensure financial discipline, optimize processes, identify cost-saving opportunities, and drive operational excellence. Key responsibilities include overseeing daily operations, leading health-of-business reviews, developing plans of record, identifying cost reduction opportunities, leading continuous improvement initiatives, providing counsel on people-related issues, developing employee engagement strategies, managing hiring coordination, and delivering analytical insights. The role requires a Bachelor's degree, 3+ years of industry experience, experience in organizational communication and presenting analytical data, and hands-on experience with business data and analytics, including proficiency with Microsoft Office suite and Power BI.

This role focuses on the physical design integration of custom CPU designs, from RTL to GDS, for manufacturing. It involves synthesis, place and route, timing analysis, and verification, with a focus on optimizing CPU designs for power, frequency, and area. The role collaborates with various teams and EDA vendors to improve design methodologies and flow automation, contributing to AI-accelerated systems.

This role focuses on CPU architecture and microarchitecture engineering at Intel, involving the design, development, and optimization of CPU logic for performance, power, and area. Responsibilities include defining specifications, evaluating trade-offs, modeling performance, and collaborating with cross-functional teams. The role requires a degree in a relevant engineering field and experience with CPU simulators and C++.

Analog Circuit Design Engineer responsible for designing critical foundational collateral (e.g., Metal Finger Capacitors, Thin Film Resistors, inductors) on leading edge Intel processes. This involves collaborating with process/device, PDK/modeling, EDA, and product design teams to co-optimize design and technology (DTCO) and deliver silicon proven solutions through test chips. Responsibilities include driving on-time library PDK release, ensuring timely development and test coverage, defining foundational IP, and designing/characterizing library collateral schematics and layouts.

This role focuses on pre-silicon IP design verification for client SOCs, involving validation of IP/features, creating test plans, debugging failures, and developing validation tools. It requires experience with RTL code, verification methodologies, and object-oriented programming.

This role is for a Senior Executive Compensation Analyst responsible for designing and managing compensation programs, including base salary, variable pay, benefits, and recognition programs. The analyst will prepare materials for the Compensation Committee, conduct market research, model compensation scenarios, administer incentive plans, and ensure compliance with SEC, IRS, and FASB standards. The role requires experience with SEC regulations, proxy disclosures, and compensation analysis.