Intel

Internship role focused on firmware development for Intel silicon products, involving design, development, validation, and debugging of embedded software for domains like BIOS, microcontrollers, and memory systems. Responsibilities include system-level modeling, algorithm development, and hardware-software integration, often under constraints. Collaboration with architects and engineers is expected. The role is for graduate students with strong programming skills (C++, C, Assemble) and experience in firmware or embedded software development.

Intern role focused on Xeon IO performance engineering, involving validation, analysis of KPIs, debugging, and optimization of networks for Intel's AI performance across diverse product segments. Responsibilities include executing performance validation, identifying bottlenecks, supporting customer co-validation, and mitigating single-point-of-failure risks in I/O domains.

This is an intern role focused on supporting and contributing to software development infrastructure and processes, including automation, monitoring, optimization, CI/CD, cloud integration, and containerization. The role involves learning and applying DevOps and SRE concepts within a hybrid cloud environment, with a focus on HPC and storage systems. The candidate will work with various teams to streamline development and release processes.

Student worker role focused on supporting software development infrastructure, automation, monitoring, optimization, CI/CD, cloud integration, containerization, and deployment workflows. Requires active student status in a relevant degree, basic server administration experience, and advanced English.

Entry-level Linux/Android Kernel Engineer role focused on SoC platform development, applying academic knowledge to real-world kernel development, FPGA environments, and industry-standard tools. Involves basic kernel module development, device drivers, and system components with mentorship.

This role focuses on designing, deploying, and maintaining Linux-based infrastructure for large-scale modeling, simulation, and data analysis workflows within Intel's Silicon Architecture group. The engineer will manage CI/CD pipelines, automation, artifact storage, and monitor/improve pipeline performance and observability, working cross-functionally to enhance developer productivity and system scalability.

Software Enabling and Optimization Engineer at Intel responsible for developing software for Intel's customers to enable, validate, and triage the integration of CPUs into their platforms. This role involves collaborating with customers and internal partners to solve critical customer problems, conducting code reviews, analyzing and debugging issues, and providing technical support. The engineer will also contribute to product development by driving application pre-enablement and product hardening, and deliver technical training and collateral to facilitate customer adoption of tools.

Intel is seeking a GPU Design Verification Engineer to ensure the functional accuracy and performance of their GPU architectures. The role involves developing verification plans, test benches, and executing simulations to validate designs, debug issues, and collaborate with cross-functional teams. The position requires experience in System Verilog, UVM, and scripting languages, with a focus on graphics IP verification for integrated, discrete, and AI-enabled platforms.

This role is for a seasoned professional GPU Design Verification Engineer to join an IP team. Responsibilities include planning, designing complex structures, leading design and verification efforts, defining strategy, and architecting testbenches. The role requires expertise in Verilog, System Verilog, UVM, assertion-based verification, and industry standard protocols. Experience with AI tools or advanced process nodes is preferred.

This role focuses on the functional verification of graphics logic components (3D graphics, media, display) within Intel's Data Center Group. The engineer will develop verification plans, test benches, and simulation models to ensure designs meet specifications, debug issues in pre-silicon environments, and collaborate with cross-functional teams to improve verification of complex features. The role requires experience with SystemVerilog, UVM, computer architecture, and ASIC design/verification.

This role involves managing and maintaining a lab environment, deploying automated tests, triaging issues, and performing hardware/software troubleshooting. It also includes designing custom equipment, monitoring tests, performing preventive maintenance, and developing technical documentation. The position requires onsite presence and is a fixed-term opportunity.

This role is for a Module Equipment Technician at Intel in Malaysia, focusing on troubleshooting, maintenance, and calibration of manufacturing equipment. It requires a technical diploma and offers opportunities for fresh graduates. The role involves supporting engineering experiments and data collection within a manufacturing environment.

Intel is seeking a SOC Performance Architect to design and evaluate complex hardware features and structures for the XEON CPU and AI portfolio. Responsibilities include defining, documenting, and testing processes, and identifying/resolving design weaknesses to influence future product architecture. The role requires experience in computer architecture, software engineering, performance analysis, SoC-level development, and proficiency in programming and scripting languages.

Develops and optimizes Intel's oneAPI Collective Communications Library for AI accelerators and GPUs, focusing on performant graph modes and efficient scaling solutions for inference and training. Requires strong C++ and Linux development skills, with experience in multithreaded programming and optimization.

This role focuses on ensuring the testability and manufacturability of integrated circuits, involving testing, validation, and debugging in a manufacturing environment. It also offers involvement in early product development phases for content implementation and validation.

Designs, develops, tests, and debugs software applications, potentially spanning the full application stack (frontend and backend). Utilizes modern software development methodologies, secure coding practices, and follows legal compliance guidelines. Responsibilities include analyzing user stories, writing functional and test code, automating build/deployment, and performing various levels of testing. Also involves SDL tasks, contributing to product documentation, and potentially interacting with end-users for requirements definition.

This Systems and Solutions Engineer role at Intel focuses on the design, development, and integration of complex systems involving software, firmware, board, and silicon components for data centers. The role involves defining system architecture, translating business needs into technical specifications, and leading the implementation of end-to-end technical solutions. Key responsibilities include automating data center infrastructure build-up, provisioning, monitoring, and creating reusable building blocks for management tools. The position requires strong programming skills (Python preferred), deep OS knowledge, experience with IaC tools, and the ability to lead cross-functional teams.

Standard Cell Design Reliability Verification Engineer at Intel, focusing on IR/EM flows, VLSI, and using EDA tools for ASIC designs. Requires expertise in device physics, FinFet characteristics, and Python for automation.

Senior Cloud Software Development Engineer to develop cutting-edge software features and optimizations for Intel's communication libraries including Intel SHMEM, Intel MPI, MPICH, and Intel oneCCL. Focus on oneCCL development, with opportunities to contribute to other libraries. Collaborate with scientists and engineers on the Aurora supercomputer at Argonne National Labs, and contribute to scientific computing and machine learning capabilities.

Senior PCB/CAD Layout Engineer to lead the design and delivery of cutting-edge printed circuit board layouts across diverse electrical systems, including both flexible and rigid circuit boards. This role combines technical excellence with strategic impact, directly contributing to Intel's key objectives through innovative PCB design solutions.

This role involves designing, developing, and maintaining Linux kernel features, subsystems, and device drivers. The engineer will optimize kernel performance, debug kernel issues, and contribute to the upstream Linux kernel project. The position requires experience with system software, OS internals, and open-source contributions, with a focus on Intel hardware platforms.

Seeking a Platform Integration Engineer to work with SoC architecture teams, design and develop high-performance networks-on-chip using chassis foundation library components, and coordinate with the foundation IP development team.

This role focuses on measuring, testing, and analyzing key performance and power indicators for hardware architecture enhancements and optimizations. It involves performing power measurements, analyzing new proof of concepts, and adapting configurations for testing. The engineer will write test scripts, analyze data, and comprehend the implications of power and performance on various client product architectures (CPU, GPU, NPU, IO). While AI is mentioned as something to adapt into daily tasks, the core function is hardware performance and power analysis.

This role is for a Facilities Water/Waste Treatment Technician at Intel, responsible for maintaining and improving water systems, conducting sampling and analysis, operating and troubleshooting equipment, and preparing technical reports. It involves collaboration with multidisciplinary teams and adherence to sustainability standards.

CPU Circuit Design Engineer responsible for designing and advancing cutting-edge digital circuits for high-performance CPUs, focusing on power, performance, area, timing, and yield optimization. Responsibilities include floorplanning, circuit design, simulation, verification, signal integrity analysis, and post-silicon analysis.

This role is for an IT Business Operations Manager at Intel, responsible for establishing consistent strategies and practices within Global IT. The manager will partner with segment leadership to ensure financial discipline, optimize processes, identify cost-saving opportunities, and drive operational excellence. Key responsibilities include overseeing daily operations, leading health-of-business reviews, developing plans of record, identifying cost reduction opportunities, leading continuous improvement initiatives, providing counsel on people-related issues, developing employee engagement strategies, managing hiring coordination, and delivering analytical insights. The role requires a Bachelor's degree, 3+ years of industry experience, experience in organizational communication and presenting analytical data, and hands-on experience with business data and analytics, including proficiency with Microsoft Office suite and Power BI.

This role focuses on the physical design integration of custom CPU designs, from RTL to GDS, for manufacturing. It involves synthesis, place and route, timing analysis, and verification, with a focus on optimizing CPU designs for power, frequency, and area. The role collaborates with various teams and EDA vendors to improve design methodologies and flow automation, contributing to AI-accelerated systems.

This role focuses on CPU architecture and microarchitecture engineering at Intel, involving the design, development, and optimization of CPU logic for performance, power, and area. Responsibilities include defining specifications, evaluating trade-offs, modeling performance, and collaborating with cross-functional teams. The role requires a degree in a relevant engineering field and experience with CPU simulators and C++.

Analog Circuit Design Engineer responsible for designing critical foundational collateral (e.g., Metal Finger Capacitors, Thin Film Resistors, inductors) on leading edge Intel processes. This involves collaborating with process/device, PDK/modeling, EDA, and product design teams to co-optimize design and technology (DTCO) and deliver silicon proven solutions through test chips. Responsibilities include driving on-time library PDK release, ensuring timely development and test coverage, defining foundational IP, and designing/characterizing library collateral schematics and layouts.

This role focuses on pre-silicon IP design verification for client SOCs, involving validation of IP/features, creating test plans, debugging failures, and developing validation tools. It requires experience with RTL code, verification methodologies, and object-oriented programming.

This role is for a Senior Executive Compensation Analyst responsible for designing and managing compensation programs, including base salary, variable pay, benefits, and recognition programs. The analyst will prepare materials for the Compensation Committee, conduct market research, model compensation scenarios, administer incentive plans, and ensure compliance with SEC, IRS, and FASB standards. The role requires experience with SEC regulations, proxy disclosures, and compensation analysis.

This role is for an entry-level Module Equipment Technician in semiconductor manufacturing. Responsibilities include operating, maintaining, repairing, and troubleshooting specialized processing equipment in a clean room environment, collecting data, and optimizing equipment and processes. The role requires physical stamina and adherence to clean room protocols. A high school diploma and completion of a specific training program are required.

This role is for an IP Functional Validation Engineer responsible for functional validation in pre-silicon or post-silicon environments. The engineer will understand architecture specifications, develop test plans, create infrastructure and automation, perform debugging, and work with stakeholders. Experience with High Speed IO (PCIE) and scripting languages like Python or C/C++ is required.

This is an intern role focused on developing and delivering technical training programs for a manufacturing environment at Intel. The role involves assessing skill gaps, designing and delivering training using various methods, managing an LMS, and measuring training effectiveness. While AI is mentioned as a potential advantage, it is not the core focus of the role.

Internship role focused on developing, validating, and debugging embedded software and firmware for Intel's technology platforms, involving system-level challenges and collaboration with engineers. Responsibilities include assisting in design, debugging, validation, code reviews, and scripting.

Senior Logic Design Verification Engineer responsible for developing verification testbenches, RTL models, and test content for power management controller IPs. The role involves validating new architectural features, debugging RTL tests, and collaborating with cross-organizational partners. Requires at least 8 years of experience with UVM and System Verilog.

This role focuses on optimizing supply chain planning, including schedules, forecasts, materials, and capacity requirements. It involves data-driven decision-making, scenario planning, and continuous process improvement using LEAN methodologies. The analyst will also manage new product planning readiness and address execution issues to ensure smooth factory operations.

Develop and maintain Process Design Kits (PDKs) for semiconductor manufacturing, focusing on physical verification runsets (DRC/LVS/PERC) using EDA tools like Calibre/ICV/Pegasus. This role involves scripting, collaboration with technology and EDA partners, and ensuring the quality and operability of PDK collaterals for Intel's product design teams.

This role is for a Senior IPU SoC Architect responsible for defining the architectural vision for Infrastructure Processing Unit (IPU) and Data Processing Unit (DPU) platforms, focusing on compute, memory, and coherency architectures for next-generation data center solutions. The role involves strategic planning, interconnect and memory subsystem design, virtualization architecture, performance engineering, and technical leadership across cross-functional teams. While the role operates within the context of data center solutions that may support AI workloads, the core craft is SoC architecture and performance engineering, not AI/ML model development.

Manager for Mechanical and Thermal Engineering at Intel, leading a team in hardware design for networking products. Responsibilities include team leadership, technical strategy, and operational management for board design.

This role is for a Senior Technical Solutions Engineer focused on Advanced Packaging technologies within Intel Foundry. The primary responsibility is to serve as the main customer interface, providing technical consultation on packaging solutions, managing the customer engagement lifecycle, and collaborating with internal teams to ensure customer success. While the role supports the 'AI era' by enabling advanced packaging for AI chips, it does not directly involve building or researching AI models.

This role is for a Head of Government Affairs in Costa Rica, responsible for developing and implementing legislative, regulatory, and policy advocacy strategies for Intel. The position involves building relationships with government entities, representing Intel in high-level meetings, monitoring policy environments, and managing external advocacy efforts. The ideal candidate will have extensive experience in government affairs and stakeholder management.

This role focuses on the physical design and layout of silicon packaging, including substrate design, routing, and optimization for performance, cost, and manufacturability. It involves collaboration with silicon and hardware teams and requires experience with specific package design tools and microelectronic package physical layout.

Lead Wafer Packaging Manufacturing (WPM) Sort factories in the US and Europe regions, responsible for E-Test, Wafer Sort, and Die Sort. Manage a team of managers, engineers, and technicians, driving continuous improvement in safety, quality, output, and cost. Ensure compliance with safety and environmental regulations, meet quality goals, and own output commits. Lead technical problem-solving and implement root cause solutions for process and tool issues. Manage process transfers and maintain process synchronization across Sort floors.

Analog Circuit Design Engineer responsible for designing, developing, and optimizing analog and mixed-signal circuits in advanced process nodes, contributing to Intel's IP solutions and shaping the future of computing and communication systems.

Lead a system integration team for Intel's WiFi products, focusing on delivering best-in-class wireless performance, defining and driving system POCs, and integrating new features and hardware. The role involves leading and mentoring engineers, enhancing integration capabilities, and driving group targets, with an emphasis on using automation and AI-based capabilities to improve efficiency.

Module Engineer responsible for critical high volume manufacturing equipment and processes in semiconductor manufacturing, focusing on efficiency, yield, and technology transfer. This role involves testing, modification, maintenance, and continuous improvement of equipment and processes to meet safety, quality, and cost goals.

This role focuses on managing equipment spare parts for Intel's manufacturing operations, ensuring readiness for New Product Introduction (NPI) and High-Volume Manufacturing (HVM). It involves supply chain optimization, inventory management, cost efficiency, supplier coordination, and risk assessment for bills of materials. The position requires collaboration with engineering, project management, and manufacturing teams to align material requirements with program goals and ensure on-time delivery and operational efficiency.

Design Engineer at Intel responsible for microarchitecture and design of soft IP cores for Intel’s next generation chips (including SOCs). Requires relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification. Expertise in verilog and system verilog based logic design, design quality check tools, and potentially PCI_Express or AMBA standards. Knowledge of AI tools like Github Copilot is mentioned.

This role is responsible for preparing and processing payroll, managing employee master data, ensuring accurate payments and benefits, and maintaining payroll records. It involves collaborating with finance, legal, and tax departments, conducting audits, and ensuring compliance with internal policies and external government requirements. The role also focuses on process improvement and championing lean methodologies.