Intel

Industrial Engineer role focused on managing capital assets within Intel's proprietary systems, involving procurement, installation coordination, inventory maintenance, and shipping/receiving. The role requires collaboration with various engineering and factory stakeholders to ensure capacity requirements and optimize resources for schedules and cost targets.

Physical Design Engineer at Intel responsible for the physical design implementation of custom IP and SoC designs, transforming RTL to GDS, optimizing power, performance, and area for advanced semiconductor technology.

Seeking an experienced Linux Kernel Developer to join a system software engineering team, focusing on developing, maintaining, and optimizing Linux kernel components for x86 architectures, device drivers, and platform-level integration. The role involves supporting early platform enablement in presilicon and postsilicon environments, collaborating with cross-functional teams, and contributing to upstream Linux kernel subsystems.

Electrical Engineer R&D Intern focused on high-speed I/O technologies like PCI Express, UXI, CXL, and USB for future server platforms. Responsibilities include analyzing I/O solutions, supporting electrical feasibility studies using simulation and lab data, defining critical electrical parameters, and proposing solution approaches. The role involves collaboration with engineering groups and industry organizations, with a focus on developing simulation workflows and technical documentation.

Seeking a Sr. Principal Engineer, Customer Enabling to lead innovation in Intel's assembly packaging technologies. This role involves technical collaboration with customers, translating product requirements, participating in technology tradeoff decisions, managing customer dashboards, and ensuring high-quality outcomes in packaging processes and materials. The engineer will also drive standardization of quality systems, product qualification, and mentor technical leaders.

Student role in Mechanical, Materials, or Chemical Engineering at Intel Kiryat Gat, focusing on supporting day-to-day engineering advanced work, implementing new processes, and automation solutions in manufacturing. Requires strong data analysis abilities and statistical knowledge is an advantage.

Electrical Engineer to drive silicon processes and collaterals for advanced Intel wireless products, working with foundries to deliver next-generation wireless solutions.

Senior VLSI Process Design Engineer role focused on optimizing Intel's process technology for power, performance, and area (PPA) of Intel IPs. Responsibilities include conducting experiments, defining methodologies, building tools, analyzing results, and collaborating with design teams.

This role is for a Facilities Operations Manager at Intel in Malaysia, responsible for leading diverse operational teams to ensure efficiency, productivity, and alignment with company goals. The role involves managing day-to-day operations, analyzing data, collaborating with cross-functional teams, overseeing resource allocation, and managing stakeholder relationships. It also includes team leadership, strategic planning for operational excellence, and ensuring compliance with regulations and company policies. The ideal candidate has a Bachelor's degree in engineering, 3+ years of team management experience, and 5+ years of facilities or manufacturing operations management experience. The role requires working a night shift.

Operations Manager role focused on leading diverse operational teams to ensure efficiency, productivity, and alignment with company goals within a manufacturing or facilities context. Responsibilities include day-to-day operations management, data analysis for improvement, cross-functional collaboration, resource allocation, stakeholder relationship management, team leadership, strategic planning, KPI monitoring, and ensuring compliance with regulations and policies.

Firmware Architect role at Intel focusing on designing and developing embedded software solutions, emphasizing security and performance. Responsibilities include defining architectural frameworks, translating requirements, developing algorithms, leading vulnerability assessments, and collaborating with engineering teams on implementation and new technology adoption. Requires strong C/low-level Linux driver experience and firmware architecture/system-level design.

This role focuses on the functional verification of CPU logic to ensure design meets specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing verification plans, running system simulation models, debugging issues, and collaborating with design and architecture teams. The role requires a Bachelor's or Master's degree in Electrical/Computer Engineering with relevant experience in Design Verification methodologies (UVM, System Verilog) and Pre-silicon verification.

Construction Project Engineer (Civil, Structural, Architectural) at Intel, focusing on the design and engineering of manufacturing and cleanroom projects, specifically tool installation for semiconductor manufacturing equipment. The role involves providing engineering solutions to meet cost, schedule, and productivity targets, collaborating with various stakeholders, and driving safety culture. Requires a Bachelor's or Master's degree in civil or structural engineering with significant experience in technical facilities and equipment installation, and Professional Engineer registration.

Compiler Engineer at Intel working on C/C++/DPC++/Fortran compilers and LLVM. The role involves feature development, defect resolution, performance optimization, and conducting experiments for general and domain-specific languages targeting Intel CPUs. Collaboration with hardware design teams, other companies, and open-source communities is expected.

Internship role focused on system software engineering, including firmware, drivers, operating systems, and middleware. Responsibilities involve design, development, validation, cross-stack optimization, and reference platform development for Intel platforms. Requires proficiency in C, C++, Python, or Java, and understanding of OS architecture. Preferred qualifications include exposure to ML/AI tools and GenAI/LLM.

This role is for a Quality Engineering Manager in Assembly Packaging Testing Manufacturing (APTM) at Intel. The manager will be responsible for end-to-end manufacturing quality leadership across various processes and sites in Arizona, Oregon, and New Mexico. Key responsibilities include leading Quality Program Managers and Engineers, driving In Factory Quality programs, adapting quality systems for advanced packaging, managing supplier improvement programs, leading Quality Review Boards (QRBs), and ensuring world-class Quality KPIs. The role requires strong cross-functional leadership, experience with major quality excursions, and a deep understanding of semiconductor manufacturing processes.

Senior Design Verification Engineer for Mixed Signal IP at Intel, focusing on functional verification of mixed signal logic components, developing IP verification plans, test benches, and verification environments. Responsibilities include executing verification plans, running system simulation models, debugging issues in the presilicon environment, and collaborating with digital and analog architects, RTL developers, and physical design teams. Requires BS/MS/PhD in Engineering with significant experience in design verification, System Verilog, and OVM/UVM.

Software Applications Development Engineer to create full stack integrated software solutions for new product introduction workflows management, execution readiness and controls, build readiness and logistics capabilities, and Design of Experiments (DOE) planning applications. The role involves the complete software project lifecycle, working with stakeholders from Assembly Test Technology Development (ATTD) and Logic Technology Dev (LTD) Fabs.

Module Development Engineers at Intel lead scientific research for semiconductor manufacturing, focusing on developing and optimizing processes, materials, and equipment for innovative device architectures. This role involves feasibility studies, roadmapping, and collaboration with suppliers to drive technology development for both current high-volume manufacturing and future products. The position requires a strong background in semiconductor processing, device physics, and materials science, with experience in areas like ALD, CVD, etch, and metrology.

This role focuses on enabling new manufacturing capacity for advanced packaging suppliers by leading substrate supplier development and qualification activities. The engineer will drive technical enablement, manage readiness milestones, and collaborate with cross-functional teams and suppliers on various substrate technologies and processes.

This role focuses on ensuring the quality and reliability of manufactured products and processes, owning manufacturing ramps, specifying inspection and testing, and driving continuous improvement. It involves analyzing data, including structured and unstructured data using statistics and machine learning, to disposition products and systems. The role also handles excursion management, change control, and supplier improvement, and responds to customer-reported issues.

This role focuses on CPU performance architecture, developing and optimizing CPU logic for power, performance, and area. Responsibilities include defining CPU architecture specifications, modeling performance and power, analyzing bottlenecks, developing tests, and collaborating with engineering teams. Requires a degree in a related field and experience with C++.

This role focuses on developing and driving end-to-end architectural specifications for CPUs, influencing technical direction, and ensuring leadership in performance, power efficiency, and scalability. Responsibilities include defining hardware features, evaluating tradeoffs, conceptualizing architectural innovations, developing new instructions, modeling performance and power, creating tests and simulations, and collaborating with cross-functional teams.

Test Module Engineer at Intel in Malaysia responsible for owning and optimizing high-volume manufacturing equipment and processes for integrated circuits. This role involves testing, implementing modifications, ensuring quality and cost goals, and participating in technology transfer to global sites. Requires engineering degree, hardware/software skills, analytical abilities, and experience with statistical data analysis.

This role is for a GPU IP Engineering Program Manager at Intel, responsible for supporting the General Manager and staff in the development, integration, and execution of GPU IP. The position involves understanding the state of IP development, managing staff operations, driving cross-team projects, and ensuring effective operating rhythms. It requires strong technical fluency in Intel's technologies and engineering processes, as well as excellent program management and communication skills.

Seeking an experienced Package Design Rule Owner (DRO) to define, validate, and deploy design rules for package substrate design, collaborating with product design, manufacturing, and assembly teams to ensure competitive product designs that meet cost and manufacturability requirements. The role involves working from early technology stages through product design tape out, driving a consistent Design Rule strategy and a forward-looking roadmap, and interacting with cross-disciplinary stakeholders, external suppliers, and customers.

CPU Design Verification Engineer responsible for ensuring the functional accuracy and performance of next-generation processor designs by developing and executing verification plans, building UVM-based testbenches, running simulations, and debugging issues in the pre-silicon environment.

Software Application Engineer for Intel's Foundry Automation group, focusing on designing and developing factory automation systems (MES, PAC, scheduling) and optimizing manufacturing processes. The role involves integrating advanced production technologies and collaborating with cross-functional teams, utilizing technologies like machine learning and optimization algorithms. Requires strong database development, .NET/C# experience, and problem-solving skills.

Memory Circuit Design Engineer at Intel, focusing on developing and optimizing embedded memory designs on advanced CMOS process technologies. Responsibilities include pathfinding, PPA optimization, layout, circuit innovation, and pre-Si/post-Si validation.

Firmware Validation Engineer at Intel, focusing on defining validation strategies, developing automated test frameworks (Python/pytest), validating low-level embedded features, and performing root-cause analysis for pre-silicon and post-silicon environments. Requires strong embedded systems fundamentals, test automation proficiency, and debugging skills.

Seeking an experienced Logic Design engineer for the Intel Chassis Group to deliver component and foundation IPs for SoC chassis. Responsibilities include logic design of routers, switches, arbiters, and protocol conversion bridges, with a focus on high-performance data and control planes. Familiarity with AMBA/CXL protocols and concepts like QoS, access control, and RAS is desired. Experience with AI to assist logic design is a plus.

Intel is seeking GPU Software Development Engineers to develop software solutions for Media and Video acceleration on Intel's graphics architecture. The role involves developing cross-OS software for encode, decode, and processing, optimizing performance, and creating tools and infrastructure for next-generation GPU advancements. Responsibilities span the entire Intel Media SW stack, from drivers to application layer, including tools, infrastructure, and pre-Si enabling.

Experienced Full Stack Cloud Software Developer with a strong backend orientation to design, build, and maintain software components and tools used across the organization. Will work on complex software systems, collaborate with multiple teams, and contribute across the full software development lifecycle.

Develops firmware for Infrastructure Processing Units (IPUs) / Smart-NICs, which offload tasks from host CPUs for cloud data centers. The role involves collaborating with various teams, analyzing code, gathering requirements, developing algorithms, writing and debugging firmware on pre-silicon and silicon platforms, and troubleshooting complex issues. Additionally, the role will leverage AI tools to improve development and validation efficiency.

This role is for a CPU Logic Design Engineer responsible for designing and optimizing logic for Intel's processors. The engineer will develop RTL code, define architecture and microarchitecture features, and ensure design integrity for physical implementation. The role requires expertise in Verilog/System Verilog, modern energy-efficient design methods, and scripting languages.

Experienced Logic Designer to join the Ethernet Silicon Engineering Group, focusing on developing state-of-the-art IPU and NIC products for Data Centers. The role involves leading full development cycles from architecture to tape-out, collaborating with various teams, and working with the latest silicon technologies.

This role is for a pre-silicon power and performance engineer responsible for validating new and existing features for Intel's next-generation CPU products. The engineer will develop validation strategies, create test content, debug issues, and report results using simulation and emulation environments, focusing on power-performance correlation.

This role focuses on the pre-silicon verification of CPU logic to ensure designs meet specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing these plans using system simulation models, debugging issues in the presilicon environment, and collaborating with design and architecture teams. The role requires experience with Design Verification and Validation methodologies, UVM, System Verilog, and EDA tools.

Senior engineer focused on supply chain and logistics strategy, process and quality improvements, cost control, production yield optimization, and supplier management within Intel's semiconductor manufacturing environment. Requires deep knowledge of substrate manufacturing, raw materials, packaging technologies, and quality systems.

This role focuses on process and quality improvements within Intel's supply chain and logistics strategy, specifically in the semiconductor manufacturing environment. The engineer will define inspection methodologies, conduct cost and yield studies, explore emerging technologies, and manage supplier relationships to ensure product and commodity performance compliance. The role requires strong analytical problem-solving, supplier management, and quality management skills, with in-depth knowledge of substrate manufacturing processes and operations.

This role focuses on supply chain engineering, optimizing global supply chain strategy, implementing process improvements, and ensuring quality, reliability, and efficiency. It involves collaborating with teams, exploring emerging technologies, defining inspection methodologies, monitoring trends, driving supplier performance, and managing quality excursions.

Lead CPU Design Engineer at Intel, responsible for designing and developing logic architecture for CPUs, including RTL coding, simulation, optimization, and collaboration on architecture and microarchitecture features. Supports SoC customers for high-quality integration.

Senior Wet Etch Manufacturing Development Engineer role at Intel, focusing on advancing next-generation semiconductor manufacturing processes. Responsibilities include leading process development, optimization, feasibility studies, technology roadmapping, and driving defect reduction and yield improvement in collaboration with internal teams and external suppliers. Requires experience in semiconductor manufacturing, process development, DOE, statistical process control, and root-cause analysis.

Develops logic design, RTL coding, and simulation for AI SoC development, focusing on power, performance, area, and timing goals. Integrates IP blocks, performs quality checks, and supports silicon bring-up.

This role is for an RTL Design Engineer focused on developing logic design, RTL coding, and simulation for AI System-on-Chip (SoC) development. The engineer will integrate IP blocks, define architecture and microarchitecture, and optimize logic for power, performance, area, and timing. The role involves close collaboration with verification teams, physical design teams, and IP providers, and supports silicon bring-up and validation. While the products power AI applications, the core craft of the role is hardware design (RTL, SoC integration, timing closure) rather than AI/ML model development or deployment.

This role focuses on adapting, developing, deploying, and sustaining yield analysis software solutions for advanced packaging in semiconductor manufacturing. It involves driving defect data pipeline workflows, collaborating with various engineering teams, and contributing to system integration projects. The role requires a strong foundation in data analysis, programming (Python), and experience with defect and yield analysis applications, with a preference for AI/ML experience in Automated Defect Classification.

The Test Module Development Engineer role at Intel focuses on developing and enabling test technologies for advanced semiconductor packaging, particularly for high-performance computing and AI applications. Responsibilities include test process development, equipment modification, and feasibility studies, with a focus on scaling packaging density and improving performance. The role requires experience in electrical test, statistical controls, and FMEA/DOE methodologies.

This role focuses on the automation of CPU physical design, including synthesis, place and route, and signoff analysis. It involves developing and debugging tools and flows for high-performance CPUs, working with EDA vendors, and scripting for design automation. The role requires experience in hardware design, VLSI, and scripting languages like Python, Perl, or Tcl.

This role focuses on formal verification of IP and/or SoC microarchitecture using model checking and equivalence checking algorithms. The engineer will create verification plans, abstraction models, develop formal proofs, and maintain verification infrastructure. Collaboration with RTL developers and architects is key.

This role is for a Board and System Debug Engineer at Intel, focusing on supporting ODM operations during NPI and HVM ramp. Responsibilities include providing debug support, delivering technical training, testing production failed parts, managing documentation, and collaborating with cross-functional teams. Requires a degree in Electrical/Electronic/Computer Engineering or equivalent, with strong debugging skills and familiarity with debug tools. Scripting knowledge (Python) is a plus.