AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| MTS Silicon Design Engineer This role is for an MTS Silicon Design Engineer at AMD, focusing on the design, verification, and documentation of ASIC development. The engineer will define architecture, logic design, and system simulation, contribute to multi-dimensional designs, and evaluate the entire process flow from high-level design to synthesis, place and route, and timing/power. The role requires experience with hardware verification, physical design of deep submicron digital ASIC chips, and various EDA tools, along with proficiency in TCL, Python, and software debugging. | — | 0 |
| MTS Software Development Engineer Software Development Engineer role at AMD/Xilinx focusing on operating systems-level software, compilers, and network distribution software for semiconductor operations. Requires experience in Unix/Linux, C/C++/Python scripting, OS kernel development, machine learning concepts, code optimization, software debugging, open-source development, and algorithm design. | — | 0 |
| — |
| 0 |
| Product Quality & Reliability Engineer This role focuses on product quality and reliability engineering for AMD's datacenter CPU products, involving data analysis, customer interaction, and cross-functional collaboration to ensure product quality and customer satisfaction. It requires strong technical capabilities in server CPU technologies and effective communication skills for issue resolution and escalations. | — | 0 |
| Principal, Platform Thermal Engineer Lead This role is for a Principal, Platform Thermal Engineer Lead at AMD, focusing on server platform thermal mechanical engineering. The responsibilities include driving technical innovation in validation, debugging system-level thermal issues, supporting SOC architects with power and thermal modeling, and working with multiple teams. The role requires extensive knowledge of CFD modeling, thermal mechanical lab equipment, board/platform-level debug techniques, and system architecture. Programming/scripting skills are also preferred. | — | 0 |
| Verification Engineer This role is for a Verification Engineer working on FPGA and ASICs, focusing on IP verification for PCIe CXL based IPs. Responsibilities include developing test plans, coding UVM based testbenches, running regressions, and debugging failures. While generative AI is mentioned as a potential plus for verification tools, the core of the role is traditional hardware verification. | — | 0 |
| Software Engineer - Systems & Hardware (GPU) Software Engineer role at AMD focused on developing low-level software and GPU workloads to stress test data center GPUs and uncover hardware/software issues early in the development cycle. Collaborates with design, emulation, driver, firmware, and debug teams. Requires strong C/C++ fundamentals and experience close to hardware. | — | 0 |
| Enterprise AI Lead Systems Engineer Lead Systems Engineer for AMD's Enterprise AI Server team, responsible for end-to-end platform validation of next-generation server platforms powering AI and data centers. The role involves driving execution from architecture to post-silicon validation, debug, and customer enablement, with program-level technical authority and responsibility for critical tradeoffs to ensure product delivery on schedule and meeting performance targets. | — | 0 |
| Sr. Buyer This role is for a Sr. Buyer at AMD, focusing on indirect procurement activities to ensure supply, manage costs, and mitigate risks. It involves developing procurement strategies, contract management, supplier negotiations, and collaborating with various internal teams. The role requires strong communication, stakeholder management, and project management skills, with preferred experience in indirect procurement, SCM, and e-procurement systems. | — | 0 |
| Mechanical Engineer Mechanical Engineer at AMD responsible for designing, analyzing, and validating advanced hardware platforms for AI computing, data center, and client systems. This includes developing mechanical components, conducting FEA and structural analysis, and supporting validation efforts. The role involves hands-on lab work, running validation tests, and CAD design. | — | 0 |
| Sr. CPU Product Application Engineer This role is for a Sr. CPU Product Application Engineer at AMD, focusing on supporting EPYC Server Processors for customers in Cloud, Enterprise, HPC, and Sovereign AI segments. The engineer will manage technical interactions with key customers, assist in system bring-up and validation, lead debug of hardware/firmware issues, and work on manufacturing tests. The role requires strong analytical, debugging, and communication skills, with experience in server and data center system architecture, electrical validation, and Linux environments being preferred. | — | 0 |
| Sr. GPU Product Application Engineer AMD is seeking a Sr. GPU Product Application Engineer to support customers deploying AMD Instinct Accelerators in their data centers for AI workloads. The role involves direct customer technical interaction, debug, validation support, and providing recommendations for AMD's AI hardware and software offerings. | — | 0 |
| Lead Photonics System Engineer This role is for a Lead Photonics System Engineer at AMD, focusing on architecting and bringing to market advanced optical interconnects for AI and data centers. The engineer will define product specifications, work cross-functionally, engage with customers, and optimize system performance across optical, electrical, and thermal domains. Experience with optical transceiver design, high-baud communication devices, and system-level bring-up is preferred. | — | 0 |
| SoC Physical Integration Engineer This role is for a SoC Physical Integration Engineer at AMD, focusing on the physical and electrical verification and tape out of AMD SoC FPGA/ACAP devices. Responsibilities include defining integration flows, developing verification tools, designing/integrating sub-blocks, and coordinating with various engineering groups. The role requires a strong understanding of FPGA architecture and physical implementation tools, with experience in circuit design and scripting languages. | — | 0 |
| System/Test Validation Engineer Lead system test engineering for AMD's next-generation accelerator products, from early development through high-volume manufacturing. This role involves defining system-level test strategy, driving execution, ensuring robust coverage, and managing a team of system test engineers. The focus is on functionality, compatibility, and reliability of accelerator products, with cross-functional collaboration with design, product engineering, operations, and business partners. | — | 0 |
| Mechanical Engineer Mechanical Engineer role at AMD focusing on developing advanced thermal-mechanical solutions for next-generation SoC, CPU, and GPU products. Responsibilities include design, simulation (FEA), validation, and collaboration with cross-functional teams and suppliers. Requires experience in mechanical product development, semiconductor packaging or thermal cooling design, and proficiency in FEA tools and CAD. | — | 0 |
| CPU Core Performance Staff Engineer This role focuses on the architecture, design, and modeling of high-performance CPU core features using performance simulators. It involves correlating performance across different stages of the CPU design process, from pre-silicon simulation to post-silicon. The engineer will innovate technical ideas related to CPU architecture and performance modeling, lead teams, and collaborate with cross-functional engineering teams. While AI tools and methods are mentioned as a preferred experience for designing, testing, and optimizing code, the core of the role is CPU performance engineering, not AI/ML model development. | — | 0 |
| Senior Post-Silicon Power & Performance Attainment Engineer This role is for a Senior Post-Silicon Power & Performance Attainment Engineer at AMD, focusing on Design-for-Test (DFT) architecture, implementation, and validation for complex SoC designs. The engineer will collaborate with various teams to ensure test coverage, efficient manufacturing test solutions, and successful silicon bring-up. The role involves defining and implementing DFT features, performing scan insertion and ATPG, verifying patterns, analyzing test coverage, and supporting silicon bring-up and yield learning. While the company mentions AI and data centers, the core responsibilities are in semiconductor design and testing, not AI/ML model development. | — | 0 |
| Interconnect Micro-architect/RTL Design Engineer AMD is seeking an Interconnect Micro-architect/RTL Design Engineer to help build the next generation coherent interconnect for CPUs, GPUs, and special purpose accelerators. The role involves architectural exploration, microarchitectural definition, RTL design, optimization for power/performance/area/timing, and participation in post-silicon debug. | — | 0 |
| Lead System/Test Validation Engineer Lead System/Test Validation Engineer at AMD responsible for System and Silicon debug of AMD EPYC Server & AMD Instinct products, focusing on post-silicon validation and driving improvements to debug methodology. | — | 0 |
| Power Design Engineer - Board -Level AMD is seeking a Power Design Engineer responsible for the innovation and design of board-level DC-DC power conversion and input protection for next-generation products, ensuring industry-leading reliability, performance, and efficiency. The role involves making trade-offs between performance, cost, reliability, and component availability, providing technical guidance, troubleshooting complex power issues, and collaborating with cross-functional teams and vendors. | — | 0 |
| Integrated Circuit Packaging Architect This role is for an Integrated Circuit Packaging Architect at AMD. The primary focus is on driving packaging architecture, roadmap definition, and technology development for various AMD products including AI and data centers. Responsibilities include collaborating with design teams, defining DFM/DFY guidelines, leading cross-functional teams, and communicating technical progress. While the company mentions AI and data centers, the core function of this role is in semiconductor packaging architecture and technology development, not direct AI/ML model development or deployment. | — | 0 |
| Integrated Circuit Packaging Architect This role focuses on integrated circuit packaging architecture, driving roadmap definition, technology development from concept to qualification, and leading cross-functional teams in the semiconductor field. It involves collaboration with product design teams and ecosystem partners to define packaging strategies, DFM/DFY guidelines, and yield improvement initiatives. | — | 0 |
| Manager - Post Silicon HSIO Validation Manager of Systems Design Engineering at AMD, focusing on post-silicon validation of high-speed IO (CXL, PCIe) for datacenter CPUs. The role involves technical leadership, team management, test plan design, feature enablement, problem-solving, and driving validation planning and execution. Experience in automation, pre/post-silicon verification, and power/performance analysis is preferred. | — | 0 |
| Program Manager This Program Manager role at AMD focuses on operational initiatives for new product introductions, contract manufacturer onboarding, recovery center strategy, and rework program execution. The role involves managing program timelines, coordinating cross-functional readiness, financial tracking, forecasting, and reconciliation. While the company mentions AI and its role in computing, this specific position is centered on program management within manufacturing and operations, not direct AI/ML model development or research. | — | 0 |
| Server validator & AI debug analyst This role focuses on validating server hardware and debugging issues related to AI and data center products, including EPYC and AMD Instinct. The responsibilities include driving technical innovation in validation, developing tools and scripts, debugging issues across various product phases, designing APIs, assisting test execution, and engaging with software/hardware modeling frameworks. Programming skills in Java or Python are required, along with experience in debug techniques and board/platform-level debug. | — | 0 |
| Systems Test / Validation Engineering Manager Engineering Manager for Systems Test/Validation of datacenter GPU platforms, focusing on AI/ML and HPC solutions. Responsibilities include defining test strategies, leading automation development, partnering with design and manufacturing teams, and driving issue resolution for high-volume production. Requires leadership in a fast-paced, cross-functional environment with strong technical depth in GPU hardware and datacenter technologies. | — | 0 |
| Manager of Board & System Validation Engineering This role manages a board and system validation engineering team focused on pre- and post-silicon hardware, software, and diagnostics for motherboard health and silicon validation. The team's work relates to Data Centers and AI interfaces, and the manager will drive technical issues, validation planning, and automation strategies. Experience with Datacenter and AI technologies is ideal. | — | 0 |
| Sr. Rack Integration & Hardware Engineer This role focuses on the physical integration of AI and data center hardware at the rack level, including mechanical integration, cable management, thermal considerations, and deployment readiness. It supports NPI, prototype builds, and validation, requiring collaboration with various engineering and manufacturing teams. | — | 0 |
| Cluster Applications & Experience Program Manager Program Manager for AMD's Data Center Clusters, responsible for technical program management and web/application engineering. This role will lead engineering initiatives from concept to execution and build/operate web platforms and applications for Cluster tooling. The candidate will partner across engineering and business teams, defining and driving program plans, managing risks, and integrating systems with web applications and APIs. A key responsibility includes using AI to optimize websites, applications, and workflows, and to develop new features. | — | 0 |
| Staff Validation Technologist for EPYC and AMD Instinct Staff Validation Technologist for EPYC and AMD Instinct at AMD, focusing on the technical ownership of end-to-end validation strategy, architecture, and execution at scale for AMD Servers. The role involves designing and evolving validation coverage strategy to maximize bug discovery, minimize customer escapes, and align validation with real-world customer usage, as well as driving technical innovation in validation processes and tools. | — | 0 |
| Design Verification Engineer AMD is seeking a Design Verification Engineer to join their team, focusing on delivering high-quality, industry-leading technologies. The role involves analyzing complex verification and digital design problems, driving test planning and execution, collaborating with RTL, PHY, and firmware teams, and owning coverage closure. The engineer will also develop and enhance verification infrastructure and automation. Experience with memory subsystems, high-speed interfaces, System Verilog, UVM, C/C++, and scripting is preferred. | — | 0 |
| Silicon Design Verification Engineer This role is for a Silicon Design Verification Engineer at AMD. The engineer will be responsible for planning and executing verification of complex digital design blocks, creating testbenches, debugging tests, and performing coverage analysis. Experience with System Verilog, UVM, and simulation tools is preferred, along with an understanding of ASIC development phases and various verification techniques. | — | 0 |
| Senior Engineer-Customer Tools AMD is seeking a Senior Engineer-Customer Tools to be the primary technical authority for the design, definition, and delivery of the Serviceability Engine, a critical component underpinning AMD's serviceability strategy across its product portfolio. This role involves translating high-level serviceability goals into engineering requirements, architectural specifications, and delivery plans, working closely with Program Managers and Platform Architects. Responsibilities include owning the architectural vision, defining specifications for error detection, reporting, fault isolation, and recovery, leading architectural reviews, evaluating trade-offs, establishing standards, and providing technical guidance. The role also involves partnering with Program Managers on delivery plans, identifying technical risks, and acting as a technical interface with various internal teams and external stakeholders. Familiarity with data center and cloud serviceability requirements is preferred. | — | 0 |
| SoC Security and Virtualization Validation Engineer AMD is seeking a Security IP and Virtualization Validation Engineer to join their datacenter CPU and AI post-silicon validation team. The role involves developing and executing test plans for security and virtualization features in next-generation AMD Instinct GPUs, creating test content, developing post-silicon validation infrastructure, and collaborating with cross-functional teams for root cause analysis of platform issues. Requires strong programming skills (C/C++, Python), post-silicon lab experience, and knowledge of server SOC architecture. | — | 0 |
| Senior PC Board Design Engineer AMD is seeking a Senior PC Board Design Engineer to work on their Data Center GPU organization, focusing on designing high-speed PCB layouts for AI-based Graphic Processors. The role involves developing routing strategies, collaborating with various engineering teams, and contributing to new tools and processes for mass volume manufacturing. | — | 0 |
| PCIe / CXL and HSIO Validation Engineer This role is for a Principal Validation Engineer focused on PCIe, CXL, and HSIO interfaces for AMD's datacenter CPU post-silicon validation. Responsibilities include developing and executing test plans, creating test content, developing validation infrastructure, debugging issues, and collaborating with cross-functional teams. The role requires experience with high-speed IO interfaces, silicon bring-up, and programming/scripting languages. | — | 0 |
| CPU Cores Validation Senior Staff Engineer This role is for a Senior Staff Engineer in CPU Cores Validation at AMD. The primary focus is on validating the functionality and testability of next-generation CPU cores and caches through hardware system setup, x86 software development, and debugging. The role requires strong analytical and problem-solving skills, attention to detail, and the ability to drive project deliverables across cross-functional teams. While the company mentions AI and next-generation computing, the core responsibilities are in traditional silicon validation engineering, not direct AI/ML model development or deployment. | — | 0 |
| Technical Release Lead (Data Center GPU) This role is for a Release Manager at AMD, focusing on the Data Center GPU product line. The primary responsibilities include feature planning, roadmap alignment, and managing the bug triage process to ensure timely resolution of defects. The role also involves coordinating software releases across multiple business units and driving continuous improvement of release processes. While the company mentions AI and data centers, the core function of this role is release management and process coordination, not direct AI/ML development. | — | 0 |
| Hardware Systems Design Engineer - Circuit Board This role is for a Hardware Systems Design Engineer focused on circuit board design for cloud compute server systems. The engineer will lead development from concept to production, collaborate with cross-functional teams, and ensure product quality, performance, and schedule. | — | 0 |
| Firmware Memory Engineer This role focuses on the firmware design and development for high-speed memory interfaces (LPDDR, DDR) and inter-chip IO IPs. It involves pre- and post-silicon development, including RTL, firmware/hardware co-design, and algorithm design for memory PHYs. The responsibilities include firmware design for DDR PHY & DRAM Training, ATE testing, lab bring-up, and optimization for robust links. While the company mentions AI and data centers, the core of this role is in firmware engineering for memory hardware, not AI model development. | — | 0 |
| ASIC Design Verification Engineer AMD is seeking an ASIC Design Verification Engineer to join their MSIP UMC team. The role involves all aspects of IP verification, including architecture, test plans, environment development, and closure. The engineer will work on leading-edge DDR technologies for data center and machine learning workloads, contributing to the development of client, server, embedded, graphics, and semi-custom chips. Responsibilities include collaborating with architects, taking ownership of features, developing verification environments using System Verilog/UVM/SystemC, debugging regressions, and deploying verification methodologies. | — | 0 |
| Board Design & Field Systems Engineer – New Product This role focuses on board design and system engineering for high-performance FPGA/ASIC platforms, involving schematic design, component selection, system architecture, PCB layout, SI/PI optimization, hardware bring-up, complex debugging, DVT execution, root-cause analysis, and technical liaison for field deployments. It requires cross-stack troubleshooting across hardware, firmware, and system software, and collaboration with cross-functional teams and external partners. | — | 0 |
| Sr. Architect Workload Driven Power and Energy Modeling AMD is seeking a technical leader to define and scale workload-driven power and energy modeling across CPU cores and SoC platforms. This role will connect workload behavior to architecture, design, and implementation decisions, improving early insight and enabling better performance-per-watt tradeoffs. The candidate will partner across Methodology, Cores Architecture, SoC Architecture, and Physical Design to build methods that scale across products. | — | 0 |
| Security Software Engineer Software Engineer focused on application security for AMD's Vivado FPGA toolchain, protecting sensitive software and customer IP against reverse engineering, tampering, and data exposure. The role involves maintaining, improving, and evolving security features within an existing framework, with a strong emphasis on C++ development and practical security principles. | — | 0 |
| Hardware System Level Test (SLT) Product Development Engineer Develops and drives System Level Test (SLT) solutions for new and existing AMD microprocessors used in embedded systems, automotive, robotics, and networking. Responsibilities include test program development, debug, characterization, yield improvement, and collaboration with cross-functional teams to ensure product quality and manufacturing readiness. | — | 0 |
| Staff Finance Analyst Staff Financial Analyst role focused on strategic decision-making, financial modeling, performance analysis, and presenting insights to senior leadership within AMD's Corporate Financial Planning & Analysis (FP&A) team. The role involves supporting annual budgets, quarterly forecasts, and long-term financial plans, partnering with cross-functional teams, and monitoring industry trends. The candidate should be a proactive problem-solver with strong analytical skills and experience with financial analysis tools, including AI tools for finance process improvement. | — | 0 |
| Strategic Business Finance Manager This role is a finance manager position supporting AMD's AI networking and systems business. The manager will partner with business leadership to drive financial ownership across product lines, strategic deals, and P&L performance, influencing investment, pricing, and scaling in AI markets. Responsibilities include financial planning, deal analysis, business case development, and reporting. | — | 0 |
| Fellow - FPGA architecture Seeking a Fellow Architect to define and drive next-generation architecture for AMD’s adaptive FPGA devices, focusing on configuration, readback, and Partial Reconfiguration (PR). This role involves shaping the long-term vision for bitstream architecture, configuration flows, runtime reconfiguration, debug observability, and system integration, translating customer requirements across various domains into differentiated FPGA capabilities. | — | 0 |
| Manager Software Development Manager of Software Development at AMD, focusing on leading a team to develop innovative software features, bring up new products, and improve existing software quality for internal and external customers. The role involves project planning, software design, development, verification, release, team management, and cross-functional collaboration. Experience in embedded programming, C/C++, operating systems, and complex system software product delivery is preferred. | — | 0 |