Intel
- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 56 active AI roles, down 27% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Facilities Power Distribution Electrical Engineer Electrical Engineer responsible for the operation, maintenance, and upgrades of Intel's site electrical power distribution systems, including troubleshooting, studies (breaker coordination, arc flash), load tracking, and partnering with utilities and project teams. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in medium voltage systems. | — | 0 |
| Logistics Operations Manager Logistics Operations Manager at Intel in Malaysia, responsible for managing logistics operations, supplier governance, performance metrics, process improvement, and ensuring compliance. The role involves leveraging analytical and advanced technology skills, including AI, to optimize logistics solutions. | — | 0 |
| CPU Structural Design – Technology and Path finding This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools. |
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| CPU Circuit Design Engineer CPU Circuit Design Engineer role at Intel, focusing on designing next-generation CPU cores and SoCs. Responsibilities include detailed circuit analysis, design implementation, and optimization at the transistor level, meeting power, performance, and area targets. Requires BSc/MSc in EE/CE and at least 2 years of VLSI/circuit design experience. | — | 0 |
| Senior CPU Design Engineer- FE Integration and FE Flow Senior CPU Design Engineer focused on front-end integration and quality assurance across multiple teams and sites. Responsibilities include leading complex subIP integration, static methodology sign-off (CDC, RDC, Lint, low-power), and driving end-to-end integration workflows. Requires strong technical leadership and collaboration skills. | — | 0 |
| Electrical Validation Intern Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis. | — | 0 |
| High-Speed SerDes Simulation & Optimization Intern — I/O Next Generation R&D This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership. | — | 0 |
| Optical Component Link Simulation Student Worker Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications. | — | 0 |
| Electromagnetic Modeling Student Worker Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows. | — | 0 |
| Senior Verification Engineer Senior Verification Engineer role focused on ASIC/FPGA design verification using UVM, formal methods, and coverage-driven techniques. Responsibilities include defining verification strategy, leading execution, debugging, and mentoring junior engineers. Requires 5+ years of experience in ASIC/FPGA verification. | — | 0 |
| Senior Technology Project / Program Manager This role is for a Senior Technology Project / Program Manager at Intel Foundry, focused on driving end-to-end supply chain execution and cross-functional coordination to support reliable fulfillment of customer and business commitments. The role involves translating demand and supply signals into coordinated operational actions, resolving constraints, and maintaining execution rigor in a matrixed environment. It also contributes to defining and implementing scalable operating models, workflows, systems, and governance. | — | 0 |
| Design Verification Student Worker This role is for a Design Verification Student Worker at Intel, focusing on SoC design and implementation for next-generation SoCs. The candidate will explore and implement new design methodologies that utilize AI engines and modern hardware description languages. Responsibilities include IP to SoC integration, developing automation scripts, debugging digital simulations, and collaborating with design engineers. The role requires pursuing a Master's or PhD in a related field with at least one year remaining, and experience in digital design, programming/scripting, hardware description languages, and pre-Si validation. | — | 0 |
| GPU Design Verification Engineer This role is for a seasoned professional GPU Design Verification Engineer to join an IP team. Responsibilities include planning, designing complex structures, leading design and verification efforts, defining strategy, and architecting testbenches. The role requires expertise in Verilog, System Verilog, UVM, assertion-based verification, and industry standard protocols. Experience with AI tools or advanced process nodes is preferred. | — | 0 |
| Module Equipment Technician (Contract) This role is for a Module Equipment Technician at Intel in Malaysia, focusing on troubleshooting, maintenance, and calibration of manufacturing equipment. It requires a technical diploma and offers opportunities for fresh graduates. The role involves supporting engineering experiments and data collection within a manufacturing environment. | — | 0 |
| Standard Cell Design Reliability Verification Engineer Standard Cell Design Reliability Verification Engineer at Intel, focusing on IR/EM flows, VLSI, and using EDA tools for ASIC designs. Requires expertise in device physics, FinFet characteristics, and Python for automation. | — | 0 |
| Senior PCB/CAD Layout Engineer Senior PCB/CAD Layout Engineer to lead the design and delivery of cutting-edge printed circuit board layouts across diverse electrical systems, including both flexible and rigid circuit boards. This role combines technical excellence with strategic impact, directly contributing to Intel's key objectives through innovative PCB design solutions. | — | 0 |
| Linux Kernel Engineer This role involves designing, developing, and maintaining Linux kernel features, subsystems, and device drivers. The engineer will optimize kernel performance, debug kernel issues, and contribute to the upstream Linux kernel project. The position requires experience with system software, OS internals, and open-source contributions, with a focus on Intel hardware platforms. | — | 0 |
| Senior Physical Design Integration Engineer This role focuses on the physical design integration of custom CPU designs, from RTL to GDS, for manufacturing. It involves synthesis, place and route, timing analysis, and verification, with a focus on optimizing CPU designs for power, frequency, and area. The role collaborates with various teams and EDA vendors to improve design methodologies and flow automation, contributing to AI-accelerated systems. | — | 0 |
| Atom CPU Architecture Engineer This role focuses on CPU architecture and microarchitecture engineering at Intel, involving the design, development, and optimization of CPU logic for performance, power, and area. Responsibilities include defining specifications, evaluating trade-offs, modeling performance, and collaborating with cross-functional teams. The role requires a degree in a relevant engineering field and experience with CPU simulators and C++. | — | 0 |
| Senior Logic Design Verification Engineer Senior Logic Design Verification Engineer responsible for developing verification testbenches, RTL models, and test content for power management controller IPs. The role involves validating new architectural features, debugging RTL tests, and collaborating with cross-organizational partners. Requires at least 8 years of experience with UVM and System Verilog. | — | 0 |
| PDK LVS Development Engineer Develop and maintain Process Design Kits (PDKs) for semiconductor manufacturing, focusing on physical verification runsets (DRC/LVS/PERC) using EDA tools like Calibre/ICV/Pegasus. This role involves scripting, collaboration with technology and EDA partners, and ensuring the quality and operability of PDK collaterals for Intel's product design teams. | — | 0 |
| Analog Design Engineer Analog Circuit Design Engineer responsible for designing, developing, and optimizing analog and mixed-signal circuits in advanced process nodes, contributing to Intel's IP solutions and shaping the future of computing and communication systems. | — | 0 |
| Module Engineer Module Engineer responsible for critical high volume manufacturing equipment and processes in semiconductor manufacturing, focusing on efficiency, yield, and technology transfer. This role involves testing, modification, maintenance, and continuous improvement of equipment and processes to meet safety, quality, and cost goals. | — | 0 |
| Senior Equipment Spare Program Manager This role focuses on managing equipment spare parts for Intel's manufacturing operations, ensuring readiness for New Product Introduction (NPI) and High-Volume Manufacturing (HVM). It involves supply chain optimization, inventory management, cost efficiency, supplier coordination, and risk assessment for bills of materials. The position requires collaboration with engineering, project management, and manufacturing teams to align material requirements with program goals and ensure on-time delivery and operational efficiency. | — | 0 |
| Design Engineer Design Engineer at Intel responsible for microarchitecture and design of soft IP cores for Intel’s next generation chips (including SOCs). Requires relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification. Expertise in verilog and system verilog based logic design, design quality check tools, and potentially PCI_Express or AMBA standards. Knowledge of AI tools like Github Copilot is mentioned. | — | 0 |
| GPU Validation Engineer This role is for a GPU Design Verification Engineer at Intel, focusing on ensuring the quality of advanced graphics solutions, including those for AI-based graphics products. The engineer will perform functional verification, develop test benches, debug issues, and collaborate with cross-functional teams to meet functional, performance, and power goals. The role requires a Bachelor's or Master's degree with significant experience in silicon design development, validation methodologies, and simulation/emulation debugging, along with proficiency in C/C++/Python and SystemVerilog. | — | 0 |
| Intel Process Integration Engineer - (BE) This role focuses on developing and optimizing integrated process flows for interconnect modules in semiconductor manufacturing. Responsibilities include coordinating with various engineering teams, optimizing RC performance, establishing process windows, identifying and reducing yield loss mechanisms, performing root cause analysis, implementing control plans, ensuring reliability margins, and supporting technology transfer from R&D to high-volume manufacturing. The role requires a PhD in a relevant engineering or science field and experience in semiconductor fabrication or characterization. | — | 0 |
| Intel Process Integration Engineer - (FE) Process Integration Engineer at Intel, focusing on developing integrated front-end process flows for new technology nodes, analyzing yield loss, and optimizing device performance. Requires a PhD in a relevant engineering or science field and experience in semiconductor fabrication or device characterization. | — | 0 |
| Source To Pay Solutions - Senior Lead This role is for a Senior Lead in Source To Pay Solutions, focusing on Supply Chain IT systems, SAP procurement modules, and end-to-end business process design. The candidate will lead FIT/GAP analysis, design and implement solutions in SAP MM and Inventory Management, and support SAP Ariba modules. Experience with SAP ECC/S4, Ariba, EDI standards, and procurement processes is required. Knowledge of newer SAP technologies like BTP, SAP Core AI, SAP Build, Agentic, CAP, and Fiori/UI5 is preferred. | — | 0 |
| GPU Software Development Engineer GPU Software Development Engineer focused on validation and debug of graphics IP, integrating features, triaging failures, and developing debug tools. The role involves scaling across display, media, 3D, compute, and power conservation components, and enabling features for AI domains to improve performance on graphics products. Requires strong analytical and problem-solving skills, with experience in C, C++, Python, and graphics/GPU hardware/software. | — | 0 |
| Network Systems and Solutions Engineer This role focuses on providing technical support and engineering solutions for Intel's programmable Infrastructure Processing Units (IPUs) to customers, involving hardware and software integration, system bring-up, driver configuration, and use case testing. The engineer will also develop technical collateral, evaluate tools, and analyze customer feedback to drive product improvements. | — | 0 |
| APTM NPI Integration Seeking an NPI Integration Engineer to manage the development and execution of new product introductions and process transfers across factories, ensuring technology and products meet certification requirements before transferring to High Volume Manufacturing (HVM). Responsibilities include logistical coordination, acting as a primary information interface, tracking collateral, managing silicon progress, and developing new NPI systems and business processes. | — | 0 |
| Systems and Solutions Engineer This role focuses on product lifecycle management, workflow definition, requirements analysis, solution design, and program planning within the context of processor platforms. It involves cross-functional collaboration and continuous improvement of engineering processes. | — | 0 |
| Emulation Engineer This role focuses on building and optimizing emulation and FPGA models for Intel's silicon prototyping and validation efforts. The engineer will work on translating RTL designs into working prototypes, developing hardware/software collateral, and improving emulation usability and efficiency to accelerate the development process for chipsets. The role involves collaboration with design, validation, and software teams to enable pre-silicon verification and software development. | — | 0 |
| CPU power Architect Power management architect for Intel Architecture group, defining state-of-the-art CPU end-to-end power handling, including active and idle power management solutions, and interaction with OS, driver, and platform components. Focus on defining next-generation CPU power management architecture and delivering architectural specifications, initiating, guiding, and coordinating the design of new ideas and products, and driving implementation post-silicon. | — | 0 |
| Foundry Customer Device Engineer Seeking a Customer Device Engineer to join Intel's Foundry organization, focusing on bridging advanced manufacturing capabilities with customer needs. Responsibilities include coordinating cross-functional teams, managing change processes, collaborating with technology development, guiding customers, and developing innovative solutions to drive customer success in semiconductor manufacturing. | — | 0 |
| Cloud Application Development Engineer Seeking a Cloud Application Development Engineer to shape the future of cloud-based applications by enabling seamless integration of cloud platforms and DevOps solutions, ensuring a secure and scalable environment. Responsibilities include developing cloud applications, defining DevOps solutions, designing cloud architecture, implementing user interfaces, utilizing Kubernetes and microservices, creating APIs, optimizing databases, and collaborating with cross-functional teams. | — | 0 |
| CPU Formal Verification Engineer This role focuses on the formal verification of CPU microarchitectures using formal verification tools and methodologies. The engineer will develop and implement verification plans, create abstraction models, develop formal proofs, and collaborate with design teams to ensure the quality and reliability of Intel's CPU technologies, which are used in various devices including AI and machine learning systems. | — | 0 |
| CPU Verification Engineer Seeking a CPU verification engineer to ensure the functional correctness of CPU logic designs through pre-silicon verification methodologies. Responsibilities include developing verification plans, building UVM testbenches, running simulations, debugging issues, and collaborating with design and architecture teams. | — | 0 |
| Foundry Services Advanced Packaging Account Technical Solutions Engineer This role is for an experienced Technical Solutions Engineer focused on semiconductor packaging and test within Intel Foundry Services. The engineer will manage customer relationships, provide technical consultation on packaging solutions, and collaborate with internal teams to influence product roadmaps. Responsibilities include developing Statements of Work, managing the customer engagement lifecycle, and acting as the Voice of the Customer within Intel. | — | 0 |
| Foveros Direct Pathfinding Integration This role focuses on designing, developing, and qualifying packaging solutions and materials for semiconductor products, applying scientific and engineering principles. Responsibilities include managing the packaging development process from artwork to manufacturing startup, and consulting on product launch requirements. The role requires a Bachelor's degree with 6+ years of experience or a Master's with 4+ years, or a PhD with 4+ years, in a relevant engineering or science field, with expertise in packaging engineering, process development, and thermal, mechanical, and electrical design concepts. | — | 0 |
| PDK Development Technical Manager Manager for a team developing and validating Process Design Kits (PDKs) for Intel's semiconductor manufacturing. Responsibilities include leading development, QA, regression testing, root cause analysis, and team management. Requires expertise in PDK development, verification tools (ICV-PXL, Calibre-SVRF, Pegasus), and custom/back-end flows. | — | 0 |
| Standard Cell Library Design Engineer This role focuses on backend standard cell library development and collateral delivery, including layout, characterization, quality checks, and automation initiatives. It requires extensive experience with EDA tools and scripting languages, collaborating with cross-functional teams to ensure library quality and usability for Intel product teams and external customers. | — | 0 |
| Semiconductor Device Modeling Engineer Seeking a Semiconductor Device Modeling Engineer to support compact modeling activities for Intel's new technologies. Responsibilities include supporting compact modeling, developing methodologies for device targeting, and potentially applying machine learning algorithms to data analysis and model development. | — | 0 |
| Module Equipment Technician (Contract) The role involves performing electrical or mechanical troubleshooting, repair, and installation of manufacturing equipment. Responsibilities include setup, calibration, preventative maintenance, monitoring data to improve tool performance, creating reports, and supporting engineering experiments and equipment configuration changes. The goal is to maintain and improve module availability and performance targets. | — | 0 |
| College Graduate Entry-level position for fresh graduates or early career professionals with up to 2 years of experience in various STEM fields, including AI and Data Science, at Intel Malaysia. The role involves collaborating with cross-functional teams, engaging in hands-on training, and supporting the development of innovative solutions. Focus areas include digital design, physical design, data analysis, SoC, IC design, testing, validation, software development, and failure analysis, with knowledge in Python, C++, Unix/Linux, and EDA tools being beneficial. | — | 0 |
| Semiconductor Device Modeling Engineer Intel is seeking a Semiconductor Device Modeling Engineer to support compact modeling activities for new technologies. The role involves hands-on experience with transistor modeling, extraction tools, simulators, IV/CV fitting, and Python scripting. Experience with machine learning algorithms for data analysis and model development is a plus. | — | 0 |
| Firmware HW Integration Validation Lead This role focuses on leading the integration and validation of firmware for IPs and custom modules into SOCs, developing embedded software and firmware for cutting-edge technologies in environments with constrained timing and memory resources. It involves developing and executing validation test plans, collaborating across disciplines, and mentoring junior team members. | — | 0 |
| Static Timing Analysis Engineer Intel is seeking a Static Timing Analysis (STA) Engineer to join their BE Integration team, focusing on the design of future generation high-performance Intel microprocessors. The role involves advanced timing analysis, integration, optimization, and collaboration with cross-functional teams to ensure silicon meets performance requirements, power, frequency, and area targets. The engineer will also contribute to improving physical design methodologies and flow automation. | — | 0 |
| Foundry Customer Integration Engineer Customer Integration Engineer role at Intel Foundry, focusing on integrating semiconductor technologies for foundry customers. Responsibilities include identifying patterns from customer engagements, abstracting them into foundry standards, supporting customer improvement projects, responding to process issues, and collaborating with internal teams to ensure seamless technology integration and customer satisfaction. Requires strong problem-solving, communication, and project management skills within the advanced node semiconductor industry. | — | 0 |