This role is for a Sr. Staff Silicon Design Engineer focused on designing high-performance RF ADCs and DACs for FPGA devices. Responsibilities include developing circuit architectures, simulation, verification, layout collaboration, EMIR and reliability validation, design reviews, and post-silicon validation. Requires at least 5 years of experience in data converters and/or high-speed circuits, with a Bachelor's or Master's degree in Electronic Engineering.

This role focuses on planning, building, and executing the verification of new and existing features for AMD's graphics processor IP, ensuring no bugs in the final design. It involves collaborating with architects, hardware, and firmware engineers, building test plans, writing directed and random verification tests, debugging failures, and reviewing coverage metrics.

This role focuses on optimizing power and performance for AMD EPYC server platforms in datacenter environments, working with customers to diagnose and resolve efficiency challenges. It involves deep dives into BIOS, OS, I/O, and application-level workloads, requiring strong analytical and cross-functional collaboration skills.

Seeking an experienced SOC Verification Manager/Lead with deep expertise in SoC-level verification, power management verification, low-power verification methodologies, and SoC verification architecture development. The role involves defining verification strategies, architecting verification environments, driving functional and power-aware verification closure, and mentoring teams. Responsibilities include leading end-to-end verification planning, execution, coverage closure, and sign-off activities, collaborating with cross-functional teams, and supporting various verification environments (simulation, emulation, FPGA, post-silicon).

This role is for a Senior Design Verification Engineer focused on Security IP (SECIP) development at AMD. The engineer will be responsible for block-level functional verification and subsystem-level integration and verification of embedded micro-processor subsystems and hardware accelerators. The role involves developing verification architectures, testbenches, and test plans using SystemVerilog/UVM, C-DPI, and formal verification methodologies. Key responsibilities include debugging simulations, analyzing coverage, collaborating with design teams, and providing technical leadership in verification methodology and problem resolution. While the company mentions AI and its role in computing experiences, this specific position is centered on hardware verification, not AI model development or deployment.

This role focuses on evaluating the performance of AMD Adaptive System-on-Chip (SoC) and FPGA products, including processor subsystems. The engineer will develop and execute characterization test patterns to ensure design margins, speed specifications, and silicon performance across various operating conditions. Responsibilities include porting test patterns, analyzing data, and collaborating with cross-functional teams to resolve issues. Experience with SoC/FPGA pre- or post-silicon validation, scripting languages, and C/C++ is preferred.

This role focuses on building and enabling GPU platforms for data center solutions with partners and customers, involving NPI, design reviews, validation, and system bring-up. It requires experience in complex server system design and debugging, with a strong emphasis on customer collaboration and program management for successful product launches.

This role is for a Data Center Technician at AMD, responsible for hardware setup, diagnostics, troubleshooting, and decommissioning in customer data centers. It involves following standard procedures, performing quality checks, and contributing to documentation and team knowledge.

RTL Design Engineer for SerDes Technology team, focusing on high-performance wireline transceivers. Responsibilities include RTL design for digital components, micro-architecture planning, low-power design, and PPA optimization, collaborating with cross-functional teams for silicon success.

Design the layout for digital and analog circuits based on schematics using industry-leading CAD tools and cutting-edge foundry technology. This role involves floor planning, routing, and assembly of lower-level cells into IPs, running verification tools, and potentially guiding offshore contractors.

Design the layout for digital and analog circuits based on schematics using industry-leading CAD tools and cutting-edge foundry technology. This role involves floor planning, routing, and assembly of lower-level cells into IPs, running verification tools, and potentially guiding offshore contractors.

This role focuses on driving datacenter quality excellence by applying aerospace/automotive-grade rigor to datacenter infrastructure, ensuring reliability across manufacturing, OEM/ODM quality, component qualification, and material integrity. The leader will define and enforce quality standards, lead failure analysis, and collaborate with cross-functional teams to embed design-for-quality principles.

Product Engineer at AMD focusing on FPGA/Emulation & ACAP Compilation Tools. This role involves owning emulation and prototyping product areas, driving customer escalations, triaging issues, exploring innovative methodologies, and developing training materials. Requires MS or equivalent experience with 8+ years in Electrical Engineering or similar, with strong knowledge of RTL design flows, pre-silicon validation, emulation/prototyping, and scripting.

Program Manager at AMD responsible for managing customer programs and execution from concept to mass production, focusing on Data Center Platform Engineering. This role involves working with ODM/OEM partners, managing schedules, customer issues, and ensuring customer satisfaction. The role also requires communication with executives, supporting design and sales teams, and participating in pre-sales activities. Familiarity with AI/ML workloads is preferred.

The Lab Engineer (Post Silicon Validation) role at AMD is responsible for managing, maintaining, assembling, and supporting a large volume of compute systems used for platform bring-up, validation, and firmware development. This includes system assembly, firmware flashing, remote access enablement, boot failure triage, and thermal setup management, ensuring the reliable operation of lab systems. The role also involves meticulous record-keeping of hardware assets and coordinating with various teams for lab readiness and safety.

This role is for a High-Speed IO Lead Engineer at AMD, focusing on the electrical test and validation of various High-Speed IOs for SOC products. The responsibilities include defining and executing test plans, working with design teams, analyzing issues, and enhancing validation capabilities. The role requires expertise in High-Speed IO technologies, test equipment, and compliance testing, with a focus on ensuring product quality and readiness.

This role is for a Firmware Manager at AMD, leading a software development team focused on IP diagnostic suites and debugging for pre-silicon and post-silicon environments. The role involves team leadership, talent development, setting priorities, execution plans, and cross-functional collaboration. Experience in software/firmware development with C/C++ and Linux is required, along with leadership experience. While the company mentions AI and data centers, the core responsibilities of this specific role are in firmware and IP diagnostics, not direct AI/ML model development.

This role is for a Systems Engineering Lead at AMD, focusing on feature enablement and validation for Virtualization Feature Enablement & Validation within the Client & Graphics organization. The role involves technical leadership for integrated systems with multiple IPs, debugging, and collaborating with various engineering teams. While the company mentions AI and data centers as part of its mission, this specific role is focused on systems engineering and validation of virtualization technologies, not direct AI/ML model development or deployment.

Drives the development and manufacturing launch of cutting-edge datacenter hardware (server and rack systems), collaborating with cross-functional teams to ensure new products meet design standards, quality targets, and production timelines. Focuses on NPI, DFM reviews, project scheduling, prototype oversight, and production support.

This role is for a Packaging Engineer at AMD, focusing on bringing up and sustaining various package types for AMD products, including those for AI and data centers. The responsibilities include manufacturing readiness, yield, quality, cost improvements, process standardization, and supplier management. While the company works on AI products, this specific role is in hardware packaging engineering, not directly building AI models or systems.

This role is for a Senior Software Development Engineer at AMD, focusing on developing and enhancing software for new technology and product introduction projects. The role involves validating new software features, collaborating with multiple teams, and contributing to system architecture design. While the company mentions AI and data centers as areas of focus and notes the potential use of AI in the screening process, the core responsibilities of this specific role are centered on general software engineering principles and product development, not on building or researching AI models themselves.

This role supports the operations of a new AFX Farm Lab, ensuring the reliability and efficiency of AFX systems and lab infrastructure. Responsibilities include lab operations, inventory management, AFX farm system management, and technical support. The ideal candidate is hands-on, organized, detail-oriented, and capable of working independently and collaboratively in a hardware/software development environment.

This role focuses on product quality and reliability engineering for AMD's datacenter CPU products. The engineer will analyze data, interface with customers and internal teams, lead cross-functional activities, and drive issue resolution to improve customer satisfaction and confidence. Experience in semiconductor product development, data analysis, and customer interactions is preferred.

AMD is seeking a Design Verification Engineer for a 1-year contract role focused on chiplet technology. The role involves developing testbenches, writing test cases, analyzing coverage, debugging regressions, and deploying verification methodologies like UVM and Formal Verification. The position requires proficiency in Verilog, System Verilog, UVM, and ASIC design knowledge, with experience in scripting languages like Python.

This role focuses on the product development and manufacturing launch of datacenter hardware, including server and rack systems. The engineer will collaborate with cross-functional teams to ensure products meet design standards, quality targets, and production timelines, driving new product introductions from concept through production.

This role is for a Hardware Product Application Engineer at AMD who will work with customers to develop servers using AMD server CPUs and GPUs. Responsibilities include providing platform/HW support, delivering training, answering inquiries, creating collaterals, reviewing designs, and debugging issues. The role requires strong analytical and debugging skills, and experience in system development from concept to production.

AMD is seeking an experienced Mixed Signal/PLL Post-Silicon Validation Engineer to join their PLL design team. The role involves defining, specifying, and implementing advanced PLL IPs. Responsibilities include designing complex building blocks, running pre-tapeout verification, working with mask design and characterization groups, and leading/mentoring junior engineers. The position requires strong knowledge of mixed-signal circuit design, FinFET technology, PLLs, and standard design tools, with proficiency in scripting languages like Python and Perl being a plus.

This role is for a Principal, System HSIO Validation Engineer at AMD. The primary focus is on validating high-speed interfaces (PCIe Gen6/Gen7, UALink, XGMI) for CPU and GPU platforms, including data center servers and AI systems. Responsibilities include developing validation strategies, executing test plans (pre-silicon, post-silicon, compliance, margining), debugging issues, and automating validation infrastructure. The role requires strong expertise in high-speed serial interfaces, validation tools, signal integrity, and power integrity.

This role is for a Sr. Manager of Post Silicon HSIO Validation at AMD, focusing on high-speed IO like CXL and PCIe for datacenter CPUs. The position involves leading a team, contributing to test plan design, feature enablement, validation, and driving technical issues to resolution. It requires strong communication, team-working skills, and experience in the semiconductor industry, with a focus on post-silicon validation methodologies and automation.

Program Manager for AMD's Value Added Services (VAS) portfolio, focusing on scaling services to meet business and customer needs. This role involves aligning VAS priorities with business unit strategies, commercial opportunities, and operational capabilities, and partnering with various departments to translate requirements into scalable VAS solutions. The PM will drive integration of new product requirements, improve efficiency, and develop executive-ready materials for program reviews.

Program Manager for AMD's Value-Added Services (VAS) portfolio, focusing on scaling offerings, aligning with business strategies, and driving operational capabilities. This role involves cross-functional partnership with Business Units, Sales, Legal, and Finance to translate market and customer needs into scalable VAS solutions. The PM will manage strategic execution, improve efficiency, and develop executive-level communications.

Senior Board Assembly Technology Lead at AMD responsible for advanced SMT and board assembly process development for high-complexity PCB assemblies, focusing on large BGA packages with warpage and coplanarity challenges. The role involves defining assembly strategies, influencing product design, and enabling manufacturability across global manufacturing partners.

Senior Finance Manager role within AMD's Finance organization, supporting the Artificial Intelligence Group Business Unit. This position serves as the key business partner to the BU leadership team, providing financial leadership, insight, and strategic support to drive performance and achieve business objectives. The role will work cross-functionally with various AMD operations stakeholders, finance counterparts and technical accounting.

Program Manager responsible for driving planning, execution, and delivery of diagnostic, debug, validation, and enablement software for complex silicon programs, with a focus on AI and data center technologies. This role coordinates globally distributed teams, manages program readiness, supports customer-facing debug activities, and ensures timely delivery of diagnostics to support silicon bring-up, validation, production readiness, and customer enablement.

Senior Corporate Counsel - Privacy role at AMD, focusing on global privacy program with primary emphasis on European operations. Responsibilities include advising on European data protection regulations (GDPR, ePrivacy), privacy-by-design for products and AI-enabled technologies, Data Protection Impact Assessments, drafting policies, and advising on international data transfers. Requires in-house experience at a global tech company and deep knowledge of European privacy laws.

Software BIOS/BMC Engineer responsible for developing, debugging, and testing BMC and Security firmware for DCGPU products, collaborating with cross-functional teams and customers to enhance manageability, reliability, and security.

Lead IP Verification Engineer at AMD, responsible for planning, building, and executing verification of graphics processor IP features to ensure no bugs in the final design. This role involves collaboration with architects and engineers, test plan development, test building, debugging, and coverage analysis.

This role is a technical lead for CPU power estimation and optimization, focusing on shaping power strategy for high-performance CPU cores. The individual will deliver credible power projections from early architecture through sign-off and influence CPU design decisions across multiple generations. Responsibilities include defining CPU power architecture, establishing voltage domain power goals, quantifying power costs of micro-architectural features, developing and maintaining CPU-specific power models, and identifying architectural power-reduction opportunities. The role requires deep expertise in CPU micro-architecture and power drivers, strong background in power modeling, estimation, and correlation, and the ability to influence architecture decisions using quantitative power analysis.

Lead DPDK Optimization Engineer at AMD in Bangalore, India. Focuses on performance optimization and benchmarking of DPDK-based data plane applications across CPU/GPU/NPU platforms. Requires mandatory DPDK development experience and strong Linux systems knowledge.

This role is for a Product Application Engineer at AMD, focusing on customer technical leadership for the MI455 program, which is related to AI and data centers. The engineer will be responsible for system bring-up, validation enablement, design reviews, issue triage, cross-functional orchestration, customer communication, enablement, manufacturing support, sustaining support, and gathering customer feedback. The role requires strong system-level debugging skills, familiarity with data center server platforms, and the ability to lead technical execution across multiple stakeholders. While the company mentions AI and data centers, the core responsibilities are in platform engineering and customer-facing technical support, not direct AI/ML model development or research.

This role is for a Product Application Engineer at AMD, supporting customers in the Data Center Business. The engineer will be responsible for debugging and resolving multi-disciplinary customer issues across Data Center CPU, GPU, and system levels. This involves working closely with software/FW development teams, enabling customer software/FW, and assisting in the development and validation of critical customer features. The role also includes preparing technical documentation, test reports, and delivering training. Key responsibilities involve supporting ODMs/OEMs, providing technical consultation, performing issue analysis, delivering on-site support, and collaborating with partners to drive product adoption. The engineer will also be involved in board bring-up with Linux kernel and device drivers, serving as a subject matter expert in BIOS/Firmware, and optimizing platform/silicon entitlement through power and performance. The role requires hands-on coding/debugging, authoring applications notes, and preparing packages of different Linux distros. Maintaining domain expertise on new technologies is also a key aspect.

This role is for a Silicon Design Engineer focused on DFx (Design for Testability) features like SCAN, MBIST, and ATPG for AMD's silicon innovation. It involves implementing, verifying, and debugging these features, working with synthesis and PD teams, and providing post-silicon support. While AI is mentioned as a potential area of growth and the company's mission includes AI, the core responsibilities and skills are in semiconductor design and testing, not AI/ML model development or deployment.

This role is for a Sr. Lead IP/RTL Design Engineer focused on Data Fabric and NoC architecture within AMD. The engineer will micro-architect, design, and deliver RTL components, manage power, performance, and area targets, and collaborate with architecture, verification, and physical design teams. The role involves defining features, driving technical specifications, leading discussions on core interfacing, and supporting various design and verification stages, including post-silicon debug. While the company mentions AI and data centers, the core responsibilities are in hardware design (RTL, NoC, IP) rather than AI model development or deployment.

This role is for a Staff Product Development Engineer at AMD, focusing on technical planning for next-generation microprocessors. The engineer will act as a technical point of contact, provide technical supervision, and drive technical decisions. Responsibilities include collaborating with design and validation teams, developing test program infrastructure, solving complex problems, and planning product improvement activities. Experience with scripting languages, statistical analysis, and computer architecture is preferred. The role is based in Penang, Malaysia.

This is a Finance Manager role at AMD, focusing on accounting activities, compliance with US GAAP, and supporting business programs. It requires extensive experience in accounting, contract analysis, and working within a multinational corporation. The role does not involve direct AI/ML development.

This role is for a Senior Silicon Design Engineer focused on Design for Test (DFx) at AMD. The engineer will implement and verify DFT features, perform scan insertion and ATPG, and work with synthesis and PD teams. While the company mentions AI and data centers, and exposure to AI work is a plus, the core responsibilities are in traditional silicon design and verification, not directly building or researching AI models. The role is in Penang, Malaysia.

This role is for a Verification Design Engineer at AMD, focusing on verifying the Infinity Fabric network on-chip, which is used in AI/ML products. The engineer will develop software models, facilitate unit testing, and ensure design quality. While the products are used in AI/ML markets and AI tools are mentioned for efficiency, the core craft of the role is hardware verification engineering, not AI/ML model development.

This role is for a Lead Systems Engineer on the AMD EPYC Server team, focusing on silicon validation, program execution, and driving Post-Si engineering initiatives for server CPUs. It involves defining validation strategies, managing technical constraints, and overseeing test plan execution to ensure high-quality silicon delivery. The role requires strong technical leadership and collaboration across hardware, firmware, software, and validation teams.