AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| Sr. Silicon Design Engineer This role is for a Sr. Silicon Design Engineer at AMD, focusing on the research, design, development, and testing of electronic components and systems for semiconductor manufacturing. Responsibilities include definition, design, verification, and documentation for ASIC development, determining architecture design, logic design, and system simulation, and contributing to multidimensional designs involving complex integrated circuit layouts. The role involves evaluating the entire process flow from high-level designs to synthesis, place and route, and timing/power usage, working on problems of moderate scope with limited supervision. | — | 0 |
| Sr. Software Development Engineer This role is for a Sr. Software Development Engineer at AMD (Xilinx) focused on researching, designing, developing, and testing operating systems-level software, compilers, and network distribution software for semiconductor operations. The role involves developing software and tools for design, infrastructure, and technology platforms, including compilers for MLIP chips, model conversion tools, IR integration, graph partitioning, hardware-specific optimizations, and feature enhancements. The position requires a Master's degree and one year of experience in these specific areas. |
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| MTS Analog Design Engineer This role is for an MTS Analog Design Engineer at AMD, focusing on designing, developing, and testing analog and mixed-signal integrated circuitry for AMD's products. The engineer will work on circuit design, layout, simulation, testing, and collaborate with cross-functional teams to enhance processor performance. The role requires experience with advanced design flows, verification methodologies, EDA software, ASIC design tools, and high-speed analog/mixed-signal circuit design for DDR technology and CMOS technology. | — | 0 |
| MTS Silicon Design Engineer This role is for an MTS Silicon Design Engineer at AMD, focusing on the research, design, development, and testing of electronic components and systems for semiconductor manufacturing. The engineer will be involved in ASIC development, including definition, design, verification, and documentation, and will collaborate with architecture and hardware teams. Responsibilities include designing complex integrated circuits, implementing logic functions for efficient testing, and working with cross-functional teams on complex issues. The role requires expertise in Verilog, VHDL, or SystemVerilog, hardware verification, C/C++ programming, shell scripting, functional and code coverage, AMBA protocol verification, CAD tools, UVM, and Unix/Linux environments. | — | 0 |
| MTS Silicon Design Engineer AMD is hiring an MTS Silicon Design Engineer to research, design, develop, and test electronic components and systems for semiconductor manufacturing. Responsibilities include defining DFx Architecture, developing new IPs and methodologies for testability, debug, yield, and characterization, and leading the development of multidimensional designs involving complex integrated circuits. The role requires evaluating the process flow from high-level designs to synthesis, place and route, and timing and power use, and working with cross-functional teams. The position requires expertise in timing and placement constraints, logic and circuit design, EDA tools, scripting languages (TCL, PERL, Python), power yield optimization, ASIC design tools, Verilog/System Verilog, and RTL design. | — | 0 |
| Design Verification Lead This role is for a Design Verification Lead at AMD, focusing on integrating complex IP blocks into SoC subsystems and ensuring their functional correctness through advanced verification methodologies. The role involves collaborating with hardware and firmware teams, developing verification plans, building testbenches, and driving verification closure. Experience with UVM, SystemVerilog, C-DPI, and ASIC verification tools is preferred. | — | 0 |
| IP Design Engineer This role is for an IP Design Engineer at AMD, focusing on RTL design methodologies and AI-driven automation for Silicon implementation. The engineer will collaborate with architects and other engineers, build early-stage RTL designs, and enhance AI-driven infrastructure to accelerate IP integration. The role requires expertise in RTL design, VLSI flow, and scripting, with a Bachelor's or Master's in Computer Engineering or Electrical Engineering. | — | 0 |
| Signal Integrity Engineer This role focuses on the electrical performance of AMD products, including signal and power integrity for silicon, package, and platform. The engineer will design, model, simulate, and characterize high-speed signal propagation and power delivery networks, review layouts, and work with vendors. While the role supports emerging AI applications, its core function is in electrical engineering for computing hardware, not AI model development. | — | 0 |
| Technical Program Manager (Data Centers) This role is for a Senior Technical Program Manager within AMD's Data Center GPU organization, focusing on the Instinct™ GPU ecosystem. The TPM will lead complex programs from concept to customer deployment, translating customer requirements into execution plans, managing hardware and software dependencies, and ensuring timely delivery of AI and HPC platforms. The role requires strong program leadership, systems-level understanding, and cross-functional collaboration. | — | 0 |
| Senior DFT Design Engineer This role is for a Senior DFT Design Engineer at AMD, focusing on Design-for-Test (DFT) and Design-for-Debug (DFD) features for ASIC design. The responsibilities include developing RTL for DFT features, performing DFT integration, synthesis, timing analysis, verification, and ATPG. The role also involves developing CAD software and scripts, and supporting pattern debug during silicon bring-up. While the company mentions AI and AMD's mission includes accelerating AI computing experiences, this specific role is in silicon design engineering for testability, not directly building AI models or systems. | — | 0 |
| Lead DFx Silicon Design Engineer This role is for a Lead DFx Silicon Design Engineer at AMD, focusing on Design-for-Test (DFT) and Design-for-Debug (DFD) for ASICs. The responsibilities include RTL design, integration, verification, tool development, and supporting silicon bring-up. While AI is mentioned in the context of AMD's mission and potential use in screening, the core function of this engineering role is not AI/ML model development or deployment. | — | 0 |
| Snr DFT Engineer This role is for a Senior DFT Engineer at AMD, focusing on the implementation and verification of Design for Test (DFT) architecture and features for silicon design. The responsibilities include scan insertion, ATPG pattern generation and verification, test coverage analysis, and post-silicon support. The role requires a Bachelor's or Master's degree in computer engineering or Electrical Engineering and experience with DFT methodologies and tools. | — | 0 |
| Senior Windows Kernel Developer – Device Drivers & Virtualization Senior Windows Kernel Developer focused on device drivers and virtualization for AMD products, involving pre-silicon architecture through post-silicon implementation and product delivery. Requires strong C/C++ skills, Windows kernel debugging, and experience with VirtIO and WHQL certification. | — | 0 |
| Sr. Software System Designer - Embedded Linux Development This role focuses on designing and developing embedded Linux system software for AMD's next-generation products, including optimization of boot flow, board support packages, and device drivers. It involves deep collaboration across hardware, firmware, and software teams to ensure product quality, performance, and timely delivery. | — | 0 |
| Chipset IO Validation Engineer This role focuses on validating chipset IO for AMD client products, including UFS and other IO blocks. Responsibilities include defining validation strategies, executing bring-up tests, developing automated tests and AI tools, triaging issues, and collaborating with cross-functional teams. The role requires expertise in x86 architecture, UFS domain, and post-silicon validation, with a strong emphasis on debug and root-cause analysis. | — | 0 |
| RTL design Engineer with UPF ( Unified Power Format ) This role is for a Senior Silicon Design Engineer focused on RTL design and UPF for FPGA products at AMD. The engineer will collaborate on front-end design methodologies, enhance UPF analysis flows, and leverage corporate AI systems for productivity. Experience in logic design, static verification, and UPF is required, along with programming skills in Perl, Python, and TCL. | — | 0 |
| Staff Systems Design Engineer This role is for a Staff Systems Design Engineer at AMD, focusing on Datacenter Server SoC Post-Silicon features validation and enablement. The engineer will develop and execute validation test plans, build validation infrastructure, debug SoC issues, and collaborate with cross-functional teams. Experience with SoC architecture, microprocessor architecture, and server platform architecture is desired, along with programming/scripting skills and knowledge of server OSes. The role is based in Penang, Malaysia. | — | 0 |
| Senior Compiler Engineer, GPU Code Object Rewriting & Tooling Senior Compiler Engineer focused on GPU code object rewriting and tooling for HIP, OpenCL, OpenMP, and ROCm. The role involves designing and implementing ISA rewriting, ELF/DWARF manipulation, and AMDGPU codegen to support hardware fixes, errata workarounds, instrumentation, and performance experiments without recompiling user code. This is a multi-year investment in a foundation for post-link transformation and experimentation across GPU generations. | — | 0 |
| GPU Stack CI Infrastructure Engineer This role focuses on building and owning the CI infrastructure for AMD's GPU stack, ensuring timely and validated releases of software, firmware, and drivers. The engineer will be responsible for provisioning runners, integrating hardware test pipelines, and shipping automation to enable a robust release process. | — | 0 |
| Executive Assistant Executive Assistant to support senior leadership in AMD's Software Solutions and Performance Engineering organization. This role is critical for enabling effective execution, communication, and operational rhythm within a fast-paced, technical organization. Responsibilities include managing complex schedules, communications, and deliverables to ensure leaders can focus on strategic priorities. | — | 0 |
| Technical Manager, Server SOC Platform Emulation Manage, lead, and develop an SoC Platform Emulation team responsible for end-to-end HW+FW co-verification across pre-silicon and post-silicon phases to identify design, firmware, and system-level issues early, enabling higher-quality silicon and faster time-to-market. | — | 0 |
| Display Hardware IP Validation Engineer This role is for a Display Hardware IP Validation Engineer at AMD. The engineer will be responsible for the planning, pre-silicon execution, validation, silicon bring-up, and debug of AMD processor and graphics-based systems, specifically focusing on video encode/decode and display driver IP. The role involves collaborating with various teams, defining validation strategies, and debugging issues throughout the product lifecycle. It requires in-depth knowledge of SOC architecture, hardware IP, graphics pipelines, and strong programming/scripting skills. | — | 0 |
| Client System Technology Architecture Lead This role is for a Lead / Principal Systems Design Engineer focused on driving system-level technology innovation for AMD's client product portfolio. While AI is mentioned as a potential area of focus for innovation, the core responsibilities revolve around broader system architecture, roadmap definition, and leading a team of subject matter experts across various system technologies, not directly building or shipping AI models or systems. | — | 0 |
| Sr. Firmware Dev with memory controllers Develop and support firmware for server memory controllers and related platform subsystems, focusing on initialization, configuration, training, and runtime management. Collaborate with cross-functional teams on features like compression and encryption, and ensure firmware quality, security, and performance. | — | 0 |
| Program Manager Program Manager at AMD responsible for managing customer accounts and their portfolios, defining and driving project plans, identifying customer requirements, establishing engineering schedules, and ensuring successful customer program launches. The role requires strong analytical, problem-solving, and risk management skills, with a focus on cross-functional collaboration and customer satisfaction throughout the product lifecycle. | — | 0 |
| PC Board Design Engineer AMD is seeking a skilled server PCB design engineer to design, develop, and optimize server PCB layouts for high-performance computing systems. The role involves collaborating with cross-functional teams to ensure efficient, reliable, and scalable server designs that meet performance, thermal, and power requirements. | — | 0 |
| Systems Design Engineer - Memory Enablement Systems Design Engineer focused on memory enablement in a post-silicon x86 environment. Responsibilities include implementing memory subsystems, conducting experiments for memory enablement, maintaining test plans and reports, and developing test scripts. Requires strong understanding of memory subsystems, DDR5/LPDDR5, and x86 hardware/firmware/BIOS architecture. | — | 0 |
| Systems Design Engineer - Debug & Triage Systems Design Engineer responsible for post-silicon validation and debug of AMD Embedded products, including system and silicon level failures. Requires identifying, isolating, and debugging hardware and firmware issues using lab tools and scripting for automation. | — | 0 |
| Systems Design Engineer - RAS Enablement AMD is seeking a Systems Design Engineer for RAS Enablement in Bangalore, India. This role focuses on enabling Reliability, Availability, and Serviceability (RAS) features in post-silicon x86 environments, working with engineering teams to develop and execute test plans and reports. The candidate will own RAS subsystem implementation, conduct experiments, maintain test plans, develop test scripts, and debug complex problems. Experience in silicon validation, x86 architecture, and scripting is preferred. | — | 0 |
| Senior Manager Product Development Engineering - ATE Test Solutions Senior Manager Product Development Engineering for ATE Test Solutions at AMD, focusing on Data Center Graphics (DCG) NPI. The role involves leading a team to develop high-performance ATE test solutions for next-generation processors used in high-performance computing, data centers, enterprise servers, and AI clusters, ensuring business milestones, cost, and quality targets are met. Requires strong technical, analytical, and leadership skills, with expertise in DFT, test development, silicon characterization, and ATE platforms. | — | 0 |
| Sr. Technical Writer This role is for a Senior Technical Writer at AMD, focusing on creating and managing technical documentation for hardware and software products. The writer will collaborate with various teams, ensure content accuracy, and improve documentation processes. Experience with XML-based authoring, Git, and AI tools for documentation is preferred. | — | 0 |
| Technical Project Manager - Data Center Deployment This Technical Project Manager role at AMD focuses on leading AI Data Center deployments from concept to execution. The role involves managing engineering initiatives, cross-functional collaboration, schedule management, and process definition within the context of AI infrastructure. | — | 0 |
| Senior Electrical Validation Engineer Senior Electrical Validation Engineer at AMD, focusing on Datacenter Server SoC Post-Silicon IO interfaces. Responsibilities include leading engineering projects, stakeholder engagement, defining and developing IO electrical validation requirements, developing validation strategies, hands-on measurement and characterization of Post-Si IO electrical interfaces, and debugging Post-Si electrical issues. | — | 0 |
| Functional Safety Manager Manage functional safety for AMD products, focusing on automotive and industrial markets. Develop and execute safety strategy aligned with ISO 26262, lead cross-functional teams, ensure ASIL compliance, and own safety cases for production readiness. | — | 0 |
| CPU Performance Architect This role focuses on analyzing and optimizing the architectural performance of AMD's PC and Gaming processors, including CPU and AI workloads. Responsibilities include performance modeling, debugging SOC performance issues, and developing performance evaluation tools. The role requires strong analytical skills, experience with computer architecture, system simulation, and performance evaluation, as well as proficiency in C/C++. | — | 0 |
| Director, Product Development Engineering-ASIC/SoC This role is a Director of Product Development Engineering focused on semi-custom ASIC/SoC solutions for embedded markets. It involves business development, product definition, customer engagements, and shaping the long-term custom business. The role requires strong technical understanding of chip architecture and semiconductor business development, along with excellent leadership and communication skills. | — | 0 |
| Director, Product Development Engineering-ASIC/SoC This role is a Director of Product Development Engineering focused on semi-custom ASIC/SoC solutions for embedded markets. It involves business development, product definition, customer engagements, and shaping the long-term custom business. The role requires strong technical understanding of chip architecture and semiconductor business development, along with excellent leadership and communication skills. | — | 0 |
| Sr Manager, Power Management Validation This role is for a Sr Manager, Power Management Validation at AMD. The primary focus is on leading a team to deliver high-quality, industry-leading technology, specifically in pre-silicon and post-silicon memory validation, bring-up, feature enablement, optimization, and validation. The role involves leading the system memory validation strategy, project planning, customer interaction, and debug resolution. While the company mentions AI and data centers, this specific role is centered on power management validation and does not involve direct AI/ML model development or deployment. | — | 0 |
| Silicon Design Verification Engineer This role is for a Silicon Design Verification Engineer at AMD, focusing on validating the functional correctness of next-generation AMD/Xilinx programmable devices. The engineer will collaborate with architects and other engineers, define test plans, develop test benches using System Verilog and UVM, debug simulations, and review coverage metrics. Experience with computer architecture, logic design, System Verilog, UVM, and verification techniques is required, with preferred experience in C/C++, Assembly, scripting, gate-level simulation, power, and reset verification. | — | 0 |
| FPGA Power Management Engineer Seeking an experienced FPGA Power Management Engineer to architect, implement, and validate adaptive power management capabilities for next-generation FPGA platforms. This role involves designing closed-loop DVFS systems, developing power-performance optimization models, driving timing closure, and leading silicon bring-up and characterization. The engineer will collaborate with silicon, firmware, and validation teams to deliver production-ready solutions. | — | 0 |
| Packaging Design Engineer AMD is seeking an experienced Packaging Design Engineer to work on package design for FPGA devices. The role involves using Cadence tools for design, modeling, and simulations, implementing package/module physical design, layout, optimization, and verification. Responsibilities include working with pre-design negotiations, DFM/DFR, layout, and developing automation methodologies using scripting languages. Collaboration with chip and system teams is essential. | — | 0 |
| Lead EDA C++ Software Development Engineer This role is for a Lead EDA C++ Software Development Engineer at AMD, focusing on improving the performance, scalability, and quality of results for the Vivado FPGA toolchain. The engineer will research and develop novel algorithms for logic synthesis and optimization, modernize C++ codebases, and evaluate new FPGA architecture features. While the company mentions AI and data centers, the core responsibilities are in EDA tool development, not direct AI/ML model building. | — | 0 |
| Program Manager Program Manager for AMD's Embedded Business unit, responsible for owning and driving the execution of business-critical customer programs and managing strategic/TIER-1 customers in the physical AI and networking business segment. The role involves enabling customer product launches using AMD products (SoCs, SW) by working with internal teams and managing customer relationships to ensure timely delivery and successful market entry. | — | 0 |
| Program Manager This role is for a Senior Customer Program Manager in AMD's Embedded Business unit, focusing on owning and driving the execution of business-critical customer programs and managing strategic customers within the physical AI and networking business segment. The individual will enable customer product launches using AMD products (SoCs, SW) by working with internal teams and managing customer relationships to ensure timely delivery and platform entitlement. | — | 0 |
| Systems Design Engineer AMD is seeking a Senior Server Board Design Engineer to join their team in Taipei, Taiwan. This role involves designing AMD's AI server product, working with cross-functional teams to deliver high-quality proposals and products. Responsibilities include design reviews, issue investigation, and debugging during various phases of the product lifecycle. Experience with server debugging processes and board design tools like Cadence's Concept and Allegro is required. | — | 0 |
| Principal Product Development Eng. - ATE Test Solutions This role is for a Principal Product Development Engineer focused on Automated Test Equipment (ATE) test solutions for Data Center Graphics (DCG) New Product Introduction (NPI) at AMD. The engineer will develop and drive ATE test solutions to meet business milestones, focusing on test time, yield, cost, and quality. Responsibilities include test pattern development, optimization, pre-silicon engagement, post-silicon bring-up, characterization, and problem-solving, collaborating with design, product, and quality teams. | — | 0 |
| Product Development Engineer Product Development Engineer at AMD responsible for technical planning for next-generation microprocessors, serving as a technical point of contact and driving technical decisions. The role involves collaborating with design, validation, and architecture teams, developing test program infrastructure, solving complex problems, and identifying product improvement activities. Experience with scripting, Linux/Unix/Windows, and statistical analysis is preferred, as is deep knowledge of computer architecture. | — | 0 |
| SoC Physical Integration Engineer AMD is seeking a SoC Physical Integration Engineer to work on the physical and electrical verification and tape out of AMD SoC FPGA/ACAP devices. The role involves defining integration flows, developing verification tools, designing and integrating sub-blocks, and coordinating with various engineering groups. Experience with physical implementation tools and scripting languages is preferred. | — | 0 |
| Real Estate Transaction Manager This role manages real estate transactions for AMD's data center development, expansion, and operations, as well as its corporate and regional office footprint. It involves leading and executing acquisitions, leases, dispositions, and amendments, coordinating with internal partners, and ensuring sites meet data center requirements. | — | 0 |
| Business Development Sr. Manager This role is for a Business Development Sr. Manager at AMD, focusing on growing business with Large OEM and multinational partners across retail, channel, and enterprise segments. The individual will be responsible for driving customer strategy, portfolio development, go-to-market planning, commercial agreements, and financial planning to maximize growth and value for both AMD and its partners. The role requires strong cross-functional leadership and experience in technology business development, preferably in semiconductors, with a proven ability to manage complex global accounts and P&Ls. | — | 0 |
