NVIDIA
- HQ
- California, US
- Founded
- 1993
- Size
- 35,000+
- Website
- nvidia.com
NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 107 new AI-related roles. That is a -49% change versus the prior 30 days (211 → 107).
| Title | Stage | AI score |
|---|---|---|
| Senior Hardware Systems Engineer NVIDIA is seeking a Senior Hardware Systems Engineer to develop manufacturing test solutions for Datacenter products, leveraging HW and SW expertise in tester design and test automation. The role involves defining and implementing test solutions, investigating new test technologies, developing test strategies for new product features, reviewing DFT, and debugging complex hardware/software issues. Requires 8+ years of post-silicon validation experience, a degree in EE/CE or equivalent, proven experience in platform-level manufacturing test programs, datacenter platform familiarity, and proficiency in Python and Bash scripting. | — | 0 |
| Senior System Software Engineer, GeForce NOW Client Platforms Senior System Software Engineer role focused on developing and maintaining client applications for NVIDIA's GeForce NOW and NVIDIA App, involving cross-platform development (Windows, Mac, Linux, mobile) and full-stack engineering. The role requires strong C++ development skills, experience with real-time applications, and collaboration with distributed teams. | — |
| 0 |
| Senior ASIC Design Engineer – Clocks IP Senior ASIC Design Engineer role focused on designing and optimizing clocking networks for GPUs and CPUs at NVIDIA. Responsibilities include architecting clock domains, collaborating with cross-functional teams (front design, floor-planning, back end, SW, silicon solution), improving Power, Performance, and Area (PPA), and participating in the end-to-end ASIC execution cycle from micro-architecture to silicon bring-up. | — | 0 |
| Senior Power Integrity Engineer - LPU Packaging Senior Power Integrity Engineer for LPU Packaging at NVIDIA, focusing on designing and optimizing power delivery networks from die to rack level for GPUs, HBM, and high-speed SerDes. Requires extensive experience in PI, chip-package-board PDN design, simulation, and lab validation. | — | 0 |
| Senior Reliability Engineer - LPU Packaging Senior Reliability Engineer for LPU packaging at NVIDIA, focusing on package-level reliability specifications, qualification, materials selection, and data analysis for IC packaging and board-level reliability. | — | 0 |
| Senior ASIC Verification Engineer Senior ASIC Verification Engineer with extensive experience in Design Verification for clocking and reset logic in SOC and GPU ASICs. The role involves owning validation from start to finish, developing scalable solutions, and using industry-standard tools and methodologies. | — | 0 |
| Senior Memory Controller Verification Engineer Senior Verification Engineer for Tegra SoC Memory Subsystem IP verification at NVIDIA. Responsibilities include developing verification infrastructure, driving test plan execution, ensuring functional and performance correctness, and collaborating with FPGA and software teams. Requires 3+ years of ASIC verification experience with System Verilog and UVM. | — | 0 |
| Senior SOC Design Engineer NVIDIA is seeking a Senior SOC Design Engineer to join their SOC Design team. The role involves integrating advanced ASICs and collaborating with experts in various design fields to build cutting-edge GPUs and SOCs. Responsibilities include developing system-level methodologies, streamlining SOC design, ensuring RTL quality, and collaborating across teams. Requires 3+ years of chip design experience, expertise in RTL design, SOC integration, and automation, with proficiency in scripting languages. | — | 0 |
| Senior ASIC Verification Engineer Senior ASIC Verification Engineer role at NVIDIA, focusing on verifying and improving verification methodologies for system-level IPs. Requires expertise in System Verilog, UVM, Python, and RTL design. | — | 0 |
| Senior Cell Modeling and Verification Engineer NVIDIA is seeking a Senior Cell Modeling and Verification Engineer to develop behavioral models and verification for custom mixed-signal design cells used in NVIDIA's ASIC products. The role involves using Verilog, SystemVerilog, Perl, or Python, collaborating with cross-functional teams, and ensuring RTL meets design targets. | — | 0 |
| Senior Software Engineer, Hardware Tools and Methodology Development This role is for a Senior Software Engineer at NVIDIA, focusing on developing tools and methodologies for RTL generation in hardware design. The position requires strong C++ skills, understanding of ASIC design and Verilog RTL, and experience with automated workflows and algorithm improvement for RTL generation. While NVIDIA heavily utilizes AI, this specific role is in hardware tools development, not directly building AI models or systems. | — | 0 |
| Senior Hardware Systems Engineer - LPU Platform Pathfinding This role focuses on hardware systems engineering for NVIDIA's Language Processing Unit (LPU) platforms, which are designed to support demanding AI workloads. The engineer will drive hardware pathfinding, guide system-level technical decisions, and work across various teams (silicon, data center, cloud, manufacturing) to deliver production-ready systems. Responsibilities include full-stack system debug, owning interconnect and cooling architecture, and supporting program execution. The role requires broad system knowledge in electrical, mechanical, thermal, and firmware domains, with exposure to large-scale AI platforms. | — | 0 |
| Senior Design Engineer, Coherent High Speed Interconnect Senior Design Engineer role focused on the architecture and design of high-speed coherent interconnects (NVLINK-C2C) for NVIDIA's mobile SoCs and GPUs. This involves collaboration with various teams to deliver a class-leading interconnect solution that enables chiplet-based integrated products. | — | 0 |
| Senior Package Layout Engineer - Hardware Senior Package Layout Engineer at NVIDIA focusing on the design and development of IC substrates for NVIDIA products, collaborating with design teams on schedules, costs, manufacturing, and electrical design issues. | — | 0 |
| Senior I/O Subsystem Architect This role focuses on defining and architecting advanced chip interconnects and protocols, specifically for NVLink chip-to-chip communication. The responsibilities include researching and crafting architecture solutions, collaborating with various design and software teams, and driving the product lifecycle from concept through deployment. The role requires extensive experience in link layer architecture and existing interconnects. | — | 0 |
| Lead ATE Test Development Engineer - LPU NVIDIA is seeking a Lead ATE Test Development Engineer for their LPU team. This role involves defining, developing, and implementing ATE test programs for LPU products, working with overseas manufacturing teams to improve yields and reduce costs, and collaborating with cross-functional teams to debug failures and enhance reliability. The position requires a Bachelor's degree in Electrical/Computer Engineering, 12+ years of VLSI ATE testing experience, and proficiency with Advantest 93K ATE platform. | — | 0 |
| ASIC Verification Engineer NVIDIA is seeking an ASIC Verification Engineer to verify global IP across multiple products, including those related to AI. The role involves developing test plans, infrastructure, and automation flows, ensuring coverage, and collaborating with design teams. Requires BS/MS in Electrical or Computer Engineering, 2+ years of pre-silicon verification experience (UVM, SystemVerilog), ASIC design flow knowledge, and programming skills in Perl or Python. | — | 0 |
| Senior IP Verification Engineer NVIDIA is seeking a Senior IP Verification Engineer for their front-end multi-media IP team. The role involves developing and verifying multi-media IP designs using System Verilog and UVM, building testbenches, enhancing automation flows, and collaborating with design engineers and architects. Experience with HLS designs and AI-enabled IDEs is a plus. | — | 0 |
| SOC Design Engineer, ASIC Tools and Methodology Development This role focuses on developing and deploying in-house tools and workflows for SOC design and verification at NVIDIA. The engineer will manage tools for common design blocks, act as a DevOps engineer for automated RTL generation, and build new integration methodologies. Requires a Bachelor's/Master's in EE/CE, 3+ years of experience, Verilog, Python/Perl scripting, and Unix/Linux shell scripting. | — | 0 |
| Senior ASIC Verification Engineer Senior ASIC Verification Engineer role at NVIDIA, focusing on verifying global IP across various product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI. Responsibilities include developing test plans, verification infrastructure, and ensuring functional correctness and performance expectations are met. Requires 5+ years of experience in pre-silicon verification, ASIC design flow, and scripting languages like Perl or Python. | — | 0 |
| Senior ASIC Design Engineer - Hardware Senior ASIC Design Engineer focused on system-level IP, performance measurement methodologies, and RTL design for NVIDIA's GPUs and SOCs. | — | 0 |
| Senior Mask Design Engineer Senior Mask Layout Design Engineer to perform physical layout for mixed-signal functions in sub-micron CMOS technologies using Cadence tools. Responsibilities include floor planning, custom layout, verification against design rules and schematics, fill, post-processing, DRC mitigation, and foundry interactions. | — | 0 |
| Senior ASIC Timing Engineer This role focuses on ASIC timing analysis and closure for NVIDIA's GPUs, CPUs, LPUs, and SoCs. The engineer will collaborate with cross-functional teams, drive timing convergence, and implement ECOs. Requires BS/MS in Electrical or Computer Engineering with significant experience in Static Timing Analysis (STA), timing constraints, and physical design optimization. | — | 0 |
| Senior Post Silicon ATE Test Development Engineer Senior Post Silicon ATE Test Development Engineer at NVIDIA, responsible for defining and developing tests for Network Silicon IC products from wafer level to final test, managing failure analysis, and working with manufacturing teams to improve yields and reduce costs. | — | 0 |
| Embedded Software Engineer - Ethernet Switching Software Engineer role focused on developing and optimizing APIs, tools, and libraries for Ethernet switch SDKs, enabling customers to build data center switch/router software solutions, particularly for AI workloads. Requires strong C programming, algorithms, data structures, and OS concepts. | — | 0 |
| Firmware PHY Customer Success Engineer NVIDIA is seeking a Firmware Design Engineer to work on AI infrastructure, focusing on PHY-layer issues for networking devices. The role involves debugging, customer support, and collaboration with various design teams. | — | 0 |
| ASIC Design Engineer - Circuits NVIDIA is seeking an ASIC Design Engineer to join their Circuit Solutions Group. The role involves defining system-level architecture, micro-architecture, and specifications for mixed-signal chips, focusing on power delivery and power management solutions for next-generation GPUs. Responsibilities include RTL development, behavioral modeling, and collaboration with cross-functional teams throughout the ASIC design flow, from front-end to tape-out. | — | 0 |
| Senior Signal and Power Integrity Engineer Senior Signal and Power Integrity Engineer at NVIDIA, focusing on board/system SI design, simulation, and analysis for high-speed interfaces. Requires BS/MS in EE with 4+ years of SI/PI experience and proficiency in simulation tools and PCB design. | — | 0 |
| Software Test Development Engineer NVIDIA is seeking a Test Development Engineer to join their networking and interconnect products team. The role involves developing test plans, automating test execution, debugging hardware and software failures, and designing technical processes. The ideal candidate will have an MSc/BSc in Computer Science or Engineering with 3+ years of experience in programming (Python, Java, C#, C++), strong problem-solving skills, and the ability to work independently. | — | 0 |
| Senior Chip Design Engineer Senior Chip Design Engineer at NVIDIA, focusing on FullChip verification for Switch Silicon chips. Responsibilities include planning verification environments, driving execution, and collaborating with cross-functional teams. Requires 8+ years of dynamic verification experience and a B.Sc. in EE/CE. | — | 0 |
| Senior Software Engineer - Networking Senior Software Engineer focused on networking for AI clusters, developing and leading features for high-performance interconnects like Infiniband, NVLink, and Ethernet. Role involves full feature lifecycle from planning to delivery, collaboration with cross-functional teams, and deep understanding of NVIDIA products. | — | 0 |
| Senior BMC Firmware Development Engineer NVIDIA is seeking a Senior BMC Firmware Development Engineer in Taiwan to design, implement, and deliver innovations for managing GPU-based AI servers, focusing on OOB management, firmware development, server architecture, and enterprise systems. The role involves working with global teams, developing performance-optimized BMC solutions using DMTF Standards, instrumenting code, automating tests, and ensuring code quality and security. The ideal candidate will have a Bachelor's Degree in Electrical Engineering or Computer Science, 5+ years of experience in BMC firmware development on X86 or ARM platforms, strong experience with AMI/Insyde or OpenBMC, and solid understanding of low-level interfaces. Experience with C/C++, bash/python, and embedded Linux is required. | — | 0 |
| Senior Firmware Application Engineer NVIDIA is seeking a Senior Firmware Application Engineer to provide technical assistance to datacenter partners, focusing on optimizing designs with NVIDIA products and supporting platform bring-up and issue analysis. The role requires significant software development experience, particularly in server system architecture, BIOS features, UEFI, and BMC implementation, with strong C/C++ and Python skills being a plus. | — | 0 |
| SAI Software Design Engineer Software Design Engineer role at NVIDIA focused on switch and router related software development, involving the full development cycle in an embedded environment using C/C++ and Linux networking. Requires strong programming, communication, and debugging skills, with knowledge of networking protocols and testing methodologies. | — | 0 |
| Formal Verification Engineer NVIDIA is seeking a Formal Verification Engineer for their Networking team, focusing on pre-silicon design and verification of switch technologies using state-of-the-art formal verification tools and methodologies to ensure design correctness for HPC, data-center, network, and storage markets. | — | 0 |
| Formal Verification Engineer NVIDIA is seeking a Formal Verification Engineer to join their Pre-Silicon design and verification team, focusing on switch technologies. The role involves using and developing state-of-the-art formal verification tools and methodologies to prove the correctness of complex logic designs for HPC, data-center, network, and storage markets. | — | 0 |
| Senior Linux Drivers Software Engineer NVIDIA is seeking a Senior Linux Drivers Software Engineer to join their R&D Linux kernel team in Israel. The role involves implementing and maintaining sophisticated drivers and userspace libraries for network technologies, developing high-quality code for the Linux kernel, and collaborating with global teams. Requires a B.Sc. in Computer Science or equivalent, 5+ years of industry experience, C programming proficiency, and strong problem-solving skills. | — | 0 |
| Senior Firmware Architect, NVLink NVIDIA is seeking a Senior Firmware Architect for their NVLink firmware stack and GPU scale-up networking in Israel. The role involves leading the design of new networking applications, defining firmware architecture, and collaborating with ASIC and software teams. | — | 0 |
| Senior Package Layout Engineer NVIDIA Networking is seeking a Senior Package Layout Engineer to design state-of-the-art high-speed Interconnect systems for Supercomputers and Datacenters. The role involves developing complex IC substrate layouts using Cadence APD/SiP tools, optimizing pin-outs, and improving layout methodologies. Collaboration with SI/PI/HW design teams and product teams is essential, as is project leadership from start to finish. | — | 0 |
| Compute System Architect NVIDIA is seeking a Compute System Architect to work on GPU compute and memory subsystems. The role involves exploring sophisticated cross-unit features, acting as a safety net for the chip by randomly generating and debugging tests on various platforms (pre-silicon, RTL, emulator, silicon). The architect will also develop and improve test generation infrastructure and build tools to enhance efficiency. | — | 0 |
| Senior Host Management Architect NVIDIA is seeking a Senior Host Management Architect to define next-generation technologies and architectures for server management and security in data centers. The role involves defining SW/FW/HW solutions, acting as a technical reference, and translating customer requirements into product features. Requires strong C development, system architecture experience, and knowledge of Linux, networking, and server architectures. | — | 0 |
| DFX Software QA Test Dev Engineer NVIDIA is seeking a DFX Software QA Test Dev Engineer in Bengaluru, India, to orchestrate software quality for CAD tools and flows used in semiconductor product development. The role involves architecting automated testing processes, crafting test plans, developing regression frameworks, performing code reviews, and supporting tools written in C++, Python, and TCL. The ideal candidate will have a BS/MS in EE, CS, or CE with 2+ years of experience in Software QA, knowledge of testing techniques, CI/CD tools, and defect tracking systems. Familiarity with GenAI, LLM, and AI Code Generation is desirable. | — | 0 |
| Senior Infrastructure Software Systems Engineer Senior Software Engineer role focused on building and extending scalable, high-performance core infrastructure systems and distributed workflow platforms for NVIDIA's chip-design ecosystem. The role involves designing and optimizing distributed systems for orchestrating workloads, defining system architecture, and owning systems end-to-end. Requires strong experience in distributed systems, algorithms, concurrency, and programming languages like Python, C++, or Go. | — | 0 |
| CPU Performance Architect NVIDIA is seeking a CPU Performance Architect to innovate and improve CPU performance through modern microarchitectural ideas. The role involves modeling potential improvements, implementing solutions, and collaborating with build, verification, and post-silicon teams. The ideal candidate will have a deep understanding of CPU microarchitecture and architecture, with a proven track record of innovation and at least 16 years of experience. | — | 0 |
| Regulatory Compliance Engineer – Electrical Safety NVIDIA is seeking a Lead Regulatory Compliance Engineer focused on electrical safety for their products. The role involves ensuring products meet safety standards through design, testing, debugging, and certification, including market entry requirements, design consultancy, and permitting. Responsibilities include developing safety design guides, conducting risk assessments, writing compliance requirements, managing testing and certification plans with external labs, and staying updated on industry trends and regulations. The role also requires representing the company in industry forums and researching new technologies and regulatory requirements. | — | 0 |
| Senior Compiler Engineer - Backend Senior Compiler Engineer for NVIDIA's GPU Software organization, focusing on the backend of GPU compilers for graphics and compute. Responsibilities include understanding, modifying, and improving the C++ compiler backend, designing new register allocation passes and optimizations, and collaborating with global teams. The role is central to deep-learning compiler technology. | — | 0 |
| Principal Chromium and CEF Engineer, GeForce NOW Client Platforms Principal Systems Software Engineer to join the GeForce Now client platforms team. Focus on custom CEF and Chromium code for NVIDIA products, improving browser performance, reliability, cross-platform compatibility, and security for ultra-low-latency interactive applications. Responsibilities include defining and upstreaming work, maintaining CI/CD and patching infrastructure, and defining quality/reliability/performance indicators. | — | 0 |
| Hardware Applications Engineer - New College Grad 2026 NVIDIA is seeking a Hardware Applications Engineer for their enterprise solution space, focusing on datacenter products. The role involves system design reviews, resolving integration issues, understanding HPC and AI workload requirements, customer support, and hardware debug using lab tools. Requires a BS/MS/PhD in Engineering or related field, strong analytical skills, understanding of server architecture, and excellent communication skills. | — | 0 |
| Senior CAD Engineer NVIDIA is seeking a Senior CAD Engineer to join their Agile and multi-functional EDA software development team. The role involves developing tools for PCB electrical design, physical layout, and SI capabilities, assessing requirements from the design community, and building innovative solutions to improve tools and processes. Requires 8+ years of experience, BS in CS/CE/EE or equivalent, proven history of delivering EDA/ECAD around Cadence tools, and proficiency in Python and TCL. | — | 0 |
| Senior System Software Engineer - Video Senior System Software Engineer role at NVIDIA focusing on video system software, including cloud gaming, video broadcasting, and playback. Responsibilities involve contributing to the Windows device driver (WDDM), optimizing capture and encode pipelines, and working with GPUs and hardware accelerators. The role requires strong C/C++ skills, software development, optimization, and debugging, with experience in driver development being a strong plus. | — | 0 |