Currently tracking 65 active AI roles, up 115% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
| Title | Stage | AI score |
|---|---|---|
| Senior Equipment Spare Program Manager This role focuses on managing equipment spare parts for Intel's manufacturing operations, ensuring readiness for New Product Introduction (NPI) and High-Volume Manufacturing (HVM). It involves supply chain optimization, inventory management, cost efficiency, supplier coordination, and risk assessment for bills of materials. The position requires collaboration with engineering, project management, and manufacturing teams to align material requirements with program goals and ensure on-time delivery and operational efficiency. | — | 0 |
| Graduate Talent (Payroll Specialist) This role is responsible for preparing and processing payroll, managing employee master data, ensuring accurate payments and benefits, and maintaining payroll records. It involves collaborating with finance, legal, and tax departments, conducting audits, and ensuring compliance with internal policies and external government requirements. The role also focuses on process improvement and championing lean methodologies. | — |
| Silicon Packaging Design Engineer This role focuses on the physical layout design of Intel's silicon for packaging technology, involving optimization for performance, reliability, and manufacturability. It requires developing custom layouts, performing detailed planning and routing, verifying standard cell libraries, and executing layout verification processes. The engineer will use EDA tools, troubleshoot design issues, and collaborate with cross-functional teams to ensure seamless execution of silicon tape-in, driving innovative layout methodologies. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer responsible for the end-to-end physical design implementation of custom IP and SoC designs, from RTL to GDS, optimizing for power, frequency, and area. This role involves synthesis, place and route, timing analysis, verification, and contributing to the automation of physical design methodologies. | — | 0 |
| Manufacturing Training Technician The Manufacturing Training Technician role focuses on developing and managing training programs for Intel's manufacturing workforce. Responsibilities include creating training plans, coordinating logistics, administering training databases, facilitating cross-training, and transferring technical knowledge from engineers to technicians. The role requires collaboration with stakeholders, ensuring quality standards, and supporting continuous improvement projects. | — | 0 |
| PDK Development Technical Manager Manager for a team developing and validating Process Design Kits (PDKs) for Intel's semiconductor manufacturing. Responsibilities include leading development, QA, regression testing, root cause analysis, and team management. Requires expertise in PDK development, verification tools (ICV-PXL, Calibre-SVRF, Pegasus), and custom/back-end flows. | — | 0 |
| Standard Cell Library Design Engineer This role focuses on backend standard cell library development and collateral delivery, including layout, characterization, quality checks, and automation initiatives. It requires extensive experience with EDA tools and scripting languages, collaborating with cross-functional teams to ensure library quality and usability for Intel product teams and external customers. | — | 0 |
| Module Equipment Technician (Contract) The role involves performing electrical or mechanical troubleshooting, repair, and installation of manufacturing equipment. Responsibilities include setup, calibration, preventative maintenance, monitoring data to improve tool performance, creating reports, and supporting engineering experiments and equipment configuration changes. The goal is to maintain and improve module availability and performance targets. | — | 0 |
| College Graduate Entry-level position for fresh graduates or early career professionals with up to 2 years of experience in various STEM fields, including AI and Data Science, at Intel Malaysia. The role involves collaborating with cross-functional teams, engaging in hands-on training, and supporting the development of innovative solutions. Focus areas include digital design, physical design, data analysis, SoC, IC design, testing, validation, software development, and failure analysis, with knowledge in Python, C++, Unix/Linux, and EDA tools being beneficial. | — | 0 |
| Human Resources Global Services Specialist This role is for a Human Resources Global Services Specialist at Intel in Malaysia. The specialist will be the first point of contact for HR inquiries, resolve employee issues related to benefits, retirement, and mobility, and deliver high-quality customer service. Responsibilities include executing HR data transactions, leveraging data to identify service pain points, and collaborating with global teams on HR policies and systems. The role requires a background in HR or a related field with at least 2 years of schoolwork experience and English proficiency. | — | 0 |
| System and Hardware Enabling Engineer Intel is seeking a Systems and Hardware Enabling Engineer to work on the development, validation, and optimization of cutting-edge products. The role involves defining platform requirements, component selection, circuit definition, board bring-up, and testing. It also includes providing technical support to customers, creating technical collateral, evaluating and developing new tools, integrating customer feedback, and ensuring smooth product ramps. The position requires extensive experience in hardware design, board debugging, and Intel architecture, with a strong understanding of the end-to-end hardware flow and cross-functional team collaboration. | — | 0 |
| Assembly and Test NPI Technical Program Manager Seeking an experienced Technical Program Manager (TPM) to lead New Product Introduction (NPI) and technology transfer activities for a new Assembly and Test Manufacturing site in Penang. The role involves end-to-end program ownership, cross-functional leadership, schedule/risk management, and ensuring manufacturing readiness for high-volume production. | — | 0 |
| Warehouse Capacity Planning Analyst This role focuses on demand forecasting and capacity optimization for warehouse operations, specifically for Intel Foundry deals involving bailment and finished goods. The analyst will partner with business development teams to model capacity requirements, create mid to long-term capacity strategies, and identify/develop plans for capacity gaps. | — | 0 |
| Senior Silicon Design Engineer Senior Silicon Design Engineer at Intel, focusing on physical design implementation of custom IP and SoC designs from RTL to GDS. Responsibilities include synthesis, place and route, clock tree synthesis, static timing analysis, power/clock distribution, reliability analysis, and verification/signoff. The role involves optimizing designs for power, frequency, and area, and participating in methodology development. Requires Btech/Mtech with 10+ years of complex ASIC/SOC implementation experience, understanding of system/processor architecture, and proficiency in scripting languages. | — | 0 |
| Module Equipment Technician (Contract) Module Equipment Technician responsible for maintaining and troubleshooting precision equipment in a manufacturing environment. Requires a technical diploma and basic understanding of mechanical, electronic, or mechatronic systems. Experience with troubleshooting and maintenance is preferred. | — | 0 |
| Graduate Talent (IT) This IT support role focuses on providing technical assistance for IT infrastructure, engineering design, and development tools. Responsibilities include first-level customer support via various channels, participating in continuous improvement projects, and troubleshooting Windows and Linux systems. A Bachelor's degree in IT or Computer Science is required, with knowledge of development tools being a plus. | — | 0 |
| E-Core (Atom) CPU Layout Design Engineer Intel is hiring an E-Core (Atom) CPU Layout Design Engineer in Penang, Malaysia. The role involves driving the physical implementation of memory compilers, custom IP blocks, and layout partitions for future generation Intel Atom microprocessors. Responsibilities include assessing complex digital physical design assignments, working with circuit design engineers, debugging CAD tools, building and verifying physical design hierarchy, and partnering with SoC teams. Requires a Bachelor's or Master's degree in Electronic/Microelectronic Engineering, Computer Engineering, or related field, with 3+ years of layout design experience. Familiarity with VLSI and CMOS logic circuit design, and proficiency in UNIX shell script, TCL, and Perl are preferred. | — | 0 |
| CPU Circuit Design Engineer Intel is seeking an experienced Circuit Design Engineer for their CPU Technology team in Penang, Malaysia. The role focuses on custom circuit designs for next-generation CPUs, involving technical readiness, simulation, and block design to meet PPA targets. Responsibilities include design verification using signoff methodologies, timing analysis, and layout verification. | — | 0 |
| SoC Functional Validation Engineer This role focuses on the functional validation of System-on-Chip (SoC) designs, ensuring the quality and reliability of Intel's silicon solutions. Responsibilities include developing and executing pre-silicon and post-silicon validation strategies, system simulation, emulation, debugging, and collaborating with cross-functional teams to resolve issues and optimize designs. | — | 0 |
| Senior Standard Cell Library Design Manager This role manages a team responsible for the development and optimization of standard cell libraries for Intel's technology nodes, focusing on circuit design, layout, characterization, and modeling to achieve best-in-class PPA for both internal and external customers. It involves technical leadership in circuit design, managing engineers, and collaborating with process technologists and EDA vendors. | — | 0 |
| Physical Design Engineer Physical Design Engineer at Intel responsible for the physical design implementation of custom IP and SoC designs, transforming RTL to GDS, optimizing power, performance, and area for advanced semiconductor technology. | — | 0 |
| Facilities Operations Manager This role is for a Facilities Operations Manager at Intel in Malaysia, responsible for leading diverse operational teams to ensure efficiency, productivity, and alignment with company goals. The role involves managing day-to-day operations, analyzing data, collaborating with cross-functional teams, overseeing resource allocation, and managing stakeholder relationships. It also includes team leadership, strategic planning for operational excellence, and ensuring compliance with regulations and company policies. The ideal candidate has a Bachelor's degree in engineering, 3+ years of team management experience, and 5+ years of facilities or manufacturing operations management experience. The role requires working a night shift. | — | 0 |
| Facilities Operations Manager Operations Manager role focused on leading diverse operational teams to ensure efficiency, productivity, and alignment with company goals within a manufacturing or facilities context. Responsibilities include day-to-day operations management, data analysis for improvement, cross-functional collaboration, resource allocation, stakeholder relationship management, team leadership, strategic planning, KPI monitoring, and ensuring compliance with regulations and policies. | — | 0 |
| Test Module Engineer Test Module Engineer at Intel in Malaysia responsible for owning and optimizing high-volume manufacturing equipment and processes for integrated circuits. This role involves testing, implementing modifications, ensuring quality and cost goals, and participating in technology transfer to global sites. Requires engineering degree, hardware/software skills, analytical abilities, and experience with statistical data analysis. | — | 0 |
| Board and System Debug Engineer This role is for a Board and System Debug Engineer at Intel, focusing on supporting ODM operations during NPI and HVM ramp. Responsibilities include providing debug support, delivering technical training, testing production failed parts, managing documentation, and collaborating with cross-functional teams. Requires a degree in Electrical/Electronic/Computer Engineering or equivalent, with strong debugging skills and familiarity with debug tools. Scripting knowledge (Python) is a plus. | — | 0 |
| CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG) Diploma level contract role for a CPU-SoC Mask Layout Designer at Intel, focusing on the training, design, and development of next-generation SOC/CPU. Responsibilities include creating mask layouts, running verification tools, designing floorplans, and troubleshooting layout issues. Requires a Diploma in Electrical and Electronic Engineering and offers hands-on experience in semiconductor design. | — | 0 |
| Manufacturing Operation Manager Manufacturing Operations Manager role at Intel in Malaysia, focused on leading teams to ensure factory operations, equipment maintenance, and repair for optimal performance. Responsibilities include managing workflow, responding to issues, collaborating with engineering, and developing long-term strategies for manufacturing capabilities. Requires a Bachelor's degree and 2 years of experience in manufacturing operations, with expertise in semiconductor manufacturing principles and factory floor planning. | — | 0 |
| Manufacturing Operators Manufacturing Operators at Intel in Malaysia are responsible for performing product manufacturing and assembly tasks, operating equipment, collecting and evaluating operating data, and driving process improvements to meet industry standards and customer specifications. The role involves working in shifts and requires basic computer literacy and problem-solving skills. | — | 0 |
| Graduate Talent (Memory Design) This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux. | — | 0 |
| Graduate Talent (PDK QA Engineer) This role is for a Graduate Talent (PDK QA Engineer) within Intel's Design Technology Platform (DTP) organization, focusing on the Process Design Kit (PDK) group. Responsibilities include validating PDK quality for custom design components and developing regression test suites to ensure PDK accuracy across various EDA flows and process nodes. The role requires knowledge of VLSI semiconductor devices, electronic circuits, and familiarity with EDA tools. | — | 0 |
| Graduate Talent (Platform Hardware Design Engineer) Seeking a Graduate Talent Platform Hardware Engineer to support the architecture, bring-up, validation, and execution of platform hardware for test chip and validation programs. Responsibilities include board-level execution, power-on, debug, test plan execution, data collection, and documentation. The role involves collaboration with cross-functional teams and support for sustaining activities. | — | 0 |
| Graduate Talent (Memory Design) This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux. | — | 0 |
| Graduate Talent (Memory Design) This role is for a Graduate Talent in Memory Design at Intel, focusing on the pathfinding and development of advanced memory technology and circuits. Responsibilities include PPA optimization, product/design enablement, IC layout, memory array/IP design, circuit innovation, testchip design, and pre/post-Si validation. The role requires a Bachelor/Master/PhD in Electrical Engineering or related STEM field, proficiency in programming languages like Python, and familiarity with Unix/Linux. | — | 0 |
| Semiconductor Manufacturing Engineer Semiconductor Manufacturing Engineer responsible for operational support, process optimization, and new product introduction in a fabrication facility. This role involves analyzing factory metrics, developing manufacturing plans, and collaborating with engineering and automation teams to ensure efficient production and delivery schedules. | — | 0 |
| Process and Equipment Engineer Process and Equipment Engineer at Intel in Malaysia, responsible for optimizing high-volume manufacturing equipment and processes for integrated circuit production. This role involves ensuring precision, quality, cost efficiency, and technology scaling, with opportunities for global process transfer and continuous improvement. | — | 0 |
| Process and Equipment Engineer Process and Equipment Engineer at Intel in Malaysia, focusing on optimizing high-volume manufacturing equipment and processes for integrated circuits. Responsibilities include testing, defect minimization, implementing process modifications, building capacity, executing maintenance, developing excursion prevention systems, managing equipment installation, and collaborating with cross-functional teams for technology transfer. | — | 0 |
| Graduate Talent (PDK Development Engineer) This role focuses on developing and supporting Process Design Kits (PDKs) for Intel Foundry, specifically involving physical layout verification (DRC, LVS, RC extraction) and ESD protection verification using industry-standard EDA tools. The engineer will work on runset development, QA plans, debugging, and enhancing runset quality and usability for advanced Intel process technologies. | — | 0 |
| Graduate Talent (PDK Development Engineer) This role focuses on developing and supporting Process Design Kits (PDKs) for Intel Foundry, specifically involving physical layout verification (DRC, LVS, RC extraction) and ESD protection verification using industry-standard EDA tools. The engineer will work on runset development, QA plans, debugging, and enhancing runset quality and usability for advanced Intel process technologies. | — | 0 |
| Senior Facilities Electrical Engineer Senior Facilities Electrical Engineer to lead electrical infrastructure projects and maintain critical electrical systems across Intel's facilities in Malaysia. Responsibilities include designing, implementing, and optimizing electrical systems, ensuring safety, reliability, and compliance with codes and standards. Requires a Bachelor's degree in Electrical Engineering and 7-10 years of experience. | — | 0 |
| Graduate Talent (Physical Design Engineer) This role is for a Graduate Talent (Physical Design Engineer) at Intel, focusing on Foundational IP (FIP) integration QA within the Foundry Technology Development group. The responsibilities include using industry standard tools for RTL to GDS design flow, scripting and automation, developing new IP-level quality checks, and interacting with EDA tool vendors and internal IP development teams. A key aspect involves applying data analytics and AI/ML techniques to optimize processes and improve quality. | — | 0 |
| Process and Equipment Engineer (Contract) This role focuses on owning and optimizing high-volume manufacturing equipment and processes in the semiconductor industry. Responsibilities include recommending modifications for efficiency, managing maintenance and repair, driving continuous improvement for key performance indicators, and participating in technology transfer to global sites. The role also involves developing excursion prevention systems and managing equipment installation and qualification during factory ramps. | — | 0 |
| Graduate Talent (Software EDA Design Automation Engineer) This role focuses on the Design Technology Platform (DTP) within Intel Foundry Technology Development, specifically in enabling and optimizing EDA reference flow and design flow for advanced process technology. The engineer will work on front-end and back-end design aspects (RTL to GDS, digital/analog, physical design, verification, signoff) and apply AI/ML, CAD software, and data analytics to solve complex problems. The role requires proficiency in Python, C++, TCL, and SKILL, with a background in Electrical Engineering, Computer Engineering, or related STEM fields, and knowledge of VLSI Physical Digital or Custom Design implementation concepts. | — | 0 |
| Graduate Talent (Standard Cell Library Design Engineer) This role involves the design, development, verification, and delivery of standard cell libraries for Intel's next-generation SoCs and Intel Foundry customers, utilizing leading-edge process technologies. Responsibilities include circuit design, parasitic extraction and optimization, automation flow development, library characterization, and supporting library releases for product teams and external customers. The ideal candidate will have a degree in Electrical Engineering or a related field, knowledge of digital circuit design, familiarity with EDA tools, and scripting experience. | — | 0 |
| Physical Design Engineer Physical Design Engineer responsible for the implementation of custom IP and SoC designs from RTL to GDS, covering synthesis, place and route, timing analysis, and verification for Intel's advanced process nodes. | — | 0 |
| E-Core CPU Design Automation Engineer This role is for a Design Automation Engineer focused on supporting and developing CAD solutions for Intel's E-core CPU design. Responsibilities include defining and implementing verification flows for backend signoff, working with designers on various verification aspects, developing and testing EDA tools, and creating scripts to analyze design methodologies. A preferred qualification includes using Machine Learning/AI methods for circuit design automation to improve performance and power. | — | 0 |
| E-Core/Quark CPU Pre-Silicon Validation Design Engineer This role focuses on the pre-silicon validation of CPU logic, developing verification plans, test benches, and simulation models to ensure design specifications are met. It involves debugging, root-causing issues, and collaborating with architects and developers to improve verification of complex features. The position requires a Bachelor's degree in Electrical/Electronics or Computer Engineering with knowledge of computer system architecture and digital logic design. | — | 0 |
| Facilities Mechanical Project Coordinator ( Contract) This role is a Facilities Mechanical Project Coordinator responsible for supporting project management activities, ensuring smooth project execution, and leading engineering teams on mechanical, electrical, and chemical systems for specific facilities. The role involves planning, organizing, coordinating activities, maintaining documentation, tracking milestones, and preparing reports. Qualifications include project coordination experience, technical skills in CAD and project management tools, and experience with mechanical systems in facilities. | — | 0 |
| ASIC/FPGA Design Engineer Intel is seeking an experienced RTL/Logic Design Engineer to develop and maintain RTL designs using Verilog/System Verilog for FPGA and ASIC solutions. The role involves functional simulation, verification, debugging, and collaboration with cross-functional teams to ensure design quality and meet specifications. Experience with packet-based protocols and agentic AI is considered an advantage. | — | 0 |