Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Currently tracking 56 active AI roles, down 27% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Senior Silicon Photonics TD Reliability Engineer Senior Silicon Photonics TD Reliability Engineer at Intel, focusing on the reliability of silicon photonics technology and devices. Responsibilities include assessing reliability, optimizing processes, conducting experiments, developing new characterization techniques, and collaborating with cross-functional teams to ensure quality and reliability throughout the development lifecycle. The role involves root cause analysis of failures and ensuring smooth transitions from development to high-volume manufacturing. | — | 0 |
| Construction Engineering Intern Construction Engineering Intern role at Intel, supporting the execution and delivery of semiconductor manufacturing facility projects. Responsibilities include supporting databases, field validation, software testing, design development, and managing engineering content. Requires a Bachelor's degree in a relevant engineering field and strong attention to detail. | — | 0 |
| Senior Technologist, Hybrid Bonding Module Senior Technologist for Die-to-Wafer Hybrid Bonding (HBI) at Intel, focusing on process and equipment development for advanced packaging. The role involves driving improvements in yield, reliability, and defectivity for next-generation hybrid bonding technologies, supporting both development and high-volume manufacturing environments. Requires deep technical expertise in hybrid bonding process or equipment engineering. |
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| 0 |
| Software Application Development Engineer Software Application Development Engineer at Intel, focusing on developing, testing, and maintaining software applications. The role involves both frontend and backend development, secure coding practices, and collaboration with product security engineers. It requires proficiency in programming languages like C#, SQL, TypeScript, Angular, JavaScript, and knowledge of RDBMS and Agile methodologies. Experience with DevOps, CI/CD, and cloud platforms is preferred. | — | 0 |
| Senior Design Verification Engineer Senior Design Verification Engineer for Intel's Silicon Chassis team, responsible for owning verification of interconnect and chassis IP blocks. Requires expertise in verification planning, environment development, collaboration with cross-functional teams, and debugging. Experience with AI-assisted development tools is mentioned as part of the daily workflow. | — | 0 |
| IP Development Engineer Intel is seeking an IP Development Engineer with a Master's Degree in Electronics/VLSI/Computer Engineering. The role involves translating digital design concepts into RTL using System Verilog, developing microarchitectural specifications, coding RTL, running design tools, creating timing collateral, and supporting IP usage. Experience with functional bus protocols and JTAG is beneficial. Interest in automation using PERL/Python is a plus. | — | 0 |
| Collateral Design and DFM Engineer Intel is seeking a Collateral Design and DFM Lead Engineer to join their Manufacturing Development and Customer Engineering (MDCE) organization. This role focuses on advancing technology nodes from qualification to high-yield production, developing new technologies on mature node infrastructure, and enhancing Design for Manufacturability (DFM) methodologies for improved performance, yield, and ramp-up across diverse product portfolios. The engineer will lead cross-functional teams to define and enhance DFM rules, refine yield tools and flows, and predict and develop rules to avoid design marginalities. | — | 0 |
| NMSi- F11x Dry Etch Module Group Leader Leads a team of module engineers and/or manufacturing operations engineers in the Dry Etch department to support high volume manufacturing, transfer new products, and drive technology development. Focuses on safety, quality, output, and cost, while improving team productivity and efficiency. Requires experience in wafer fabrication engineering, leadership, technical problem-solving, and coaching. | — | 0 |
| Advanced Packaging Technology Development Substrates Module Engineer On-Shift (Nightshift) Module Engineer On Shift (MEOS) provides real-time factory support for equipment, process, and product issues to ensure 24/7 manufacturing operations. Responsibilities include lot movement, responding to process excursions, recovering from equipment errors, lot disposition, new tool enablement, and operational activities. The role requires strong problem-solving, communication, and adaptability in a fast-paced manufacturing environment. Minimum qualifications include a Bachelor's degree in a related engineering or science field with 1+ years of experience, or a Master's degree with 0 years of experience, along with proficiency in statistical data analysis and quality systems. Preferred qualifications include experience with DOE, SPC, semiconductor manufacturing, and metrology tools. | — | 0 |
| Director, SoC Design Engineering Director of SoC Design Engineering responsible for leading functional verification efforts for cutting-edge system-on-chip (SoC) designs, defining and implementing scalable verification methodologies to ensure first-pass silicon success. The role involves architecting verification strategies, developing test benches, leading integration of IPs, and mentoring engineers. | — | 0 |
| APTD_SWA S5 Manufacturing Technician Manufacturing Technician for Intel's Advanced Packaging Technology Development: Substrate and Wafer Assembly (APTDSWA) organization. Responsibilities include collecting and evaluating operating data, making online adjustments to equipment, performing preventive maintenance, troubleshooting issues, supporting production operations, leading improvement processes, and resolving nonstandard events. The role also involves managing training, updating manuals, and participating in safety forums and the Emergency Response Team. Requires adaptability, judgment, and ability to work with general instructions or detailed guidance. | — | 0 |
| Thermal data Analysis Engineer The Thermal Data Analysis Engineer role at Intel focuses on driving thermal design and analysis for GPU and AI accelerators. This involves simulation, experimental work, and cross-functional collaboration to ensure thermal requirements are met for high-performance computing solutions. The role requires expertise in thermal simulation tools, laboratory testing, and applying heat transfer principles to advanced cooling technologies. | — | 0 |
| Design Automation Engineer (TFM/EDA) This role is for a Design Automation Engineer focused on supporting EDA tools and Intel's PDK for external Foundry customers. Responsibilities include installation, maintenance, and technical support of design and compute environments, as well as creating automation scripts to streamline design processes. The role requires experience with front-end and back-end design tools, flows, and methodologies, along with scripting skills in languages like Tcl, Perl, and Python. | — | 0 |
| Silicon Photonics Foundry PDK Design Engineer Seeking a Silicon Photonics (SiP) PDK Design Engineer to join Intel's SPDM team. Responsibilities include creating and documenting pcell designs, design rules, and EDA tool flow automation. The role involves architecting, developing, and validating software solutions for Electronic-Photonic design automation, engaging with partners, and ensuring efficient cloud computing infrastructure. The candidate will lead the development of Design Environment and CI/CD pipelines for hardware and software products. | — | 0 |
| APTM NPI Integrator This role focuses on the introduction and transfer of new products and processes within a semiconductor factory environment. The Integrator will coordinate logistics, manage documentation, track progress through the manufacturing flow, and ensure products meet certification requirements before high-volume manufacturing. It involves understanding product lifecycles, fab processing, and post-fab activities, with a strong emphasis on project coordination and issue resolution within the manufacturing process. | — | 0 |
| Yield Development Engineer Yield Development Engineer role focused on semiconductor process development, identifying root cause yield limiters, and driving improvements in manufacturing processes and product reliability. Responsibilities include performing various spectroscopy analyses, providing customer support, assisting with instrument maintenance, and analyzing complex data. Requires a PhD in a STEM field with experience in UHV-based analytical equipment. | — | 0 |
| Ocotillo Technology Fabrication Production Manufacturing Engineer Production Manufacturing Engineer at Intel, focusing on optimizing semiconductor fabrication processes, capacity planning, and factory performance. This role involves driving improvements in cycle time, WIP velocity, output, and quality through data analysis and continuous improvement methodologies in a high-volume manufacturing environment. | — | 0 |
| PM Validation - student position Student position in Front End Validation Team at Intel, focusing on validating Intel CORE's Power Management flows and key interfaces. The role involves planning and implementing validation strategies, defining and writing test environments for RTL implementation, debugging, and driving features to tape-in quality. Requires a BSc student in Electrical or Computer Engineering with 3-4 semesters until graduation. Basic usage of GenAI tools is a plus. | — | 0 |
| Experienced Security Software development Engineer Experienced Security Software Development Engineer at Intel to validate TDX (Trusted Domain Extensions), a confidential computing technology. The role involves validating across firmware, OS, drivers, middleware, SDKs, and applications, building frameworks, automation, and reference implementations. Requires 5+ years of experience in software/hardware validation or verification and coding in C, C++, or Java. | — | 0 |
| RF Hardware Design Engineer Designs and develops RF hardware systems for WiFi and Bluetooth technologies, involving simulation, board-level design, and lab validation. The role also includes an interest in leveraging AI-based solutions to enhance engineering productivity. | — | 0 |
| DFT Automation and Validation Engineer This role focuses on developing and maintaining validation testing environments and tooling for CPU core DFT (Design for Test) validation. Key responsibilities include automation, scripting, debug tools, and improving team AI skills to support validation engineers. The role requires strong programming skills in TCL, Python, and/or Perl, and experience in pre-silicon validation or CAD/tool automation. | — | 0 |
| Graduate Talent (Analog Design Engineer) This role supports memory PHY development in areas like package layout, electrical modeling, and signal/power integrity simulation. Qualifications include a basic understanding of IC design, package/platform architectures, and signal/power integrity, with exposure to layout or validation tools being a plus. | — | 0 |
| Graduate Talent (System and Hardware Enabling Engineer) This role provides technical support for Intel products and technologies, focusing on solution design, enabling partners, and supporting product development and validation. The engineer will create technical collateral, collaborate with internal and external teams, and assist customers with product ramp and issue resolution. | — | 0 |
| Manufacturing Operator (Contract) This role involves performing product manufacturing and assembly tasks, operating and maintaining production equipment, collecting operating data, and driving process improvements in a manufacturing environment. It requires adherence to SOPs and quality standards, with potential for contract extension or conversion to permanent. | — | 0 |
| Memory Circuit Design Engineer Seeking a Memory Circuit Design Engineer to design, develop, and build custom memory circuits (SRAMs, ROMs, Caches) for Intel CPUs and SOCs. Responsibilities include technical readiness, simulation, characterization, PPA optimization, and innovation in memory design on advanced CMOS process technologies. | — | 0 |
| Mixed Signal Design Verification Engineer This role involves performing functional verification of mixed-signal logic components, including analog behavioral modeling, to ensure design specifications are met. Responsibilities include developing IP verification plans, test benches, and verification environments, executing verification plans, running system simulation models, analyzing power and timing, debugging issues, and collaborating with digital and analog architects, RTL developers, and physical design teams. The role also requires maintaining and improving verification infrastructure and methodology. | — | 0 |
| Packaging Module Development Engineer Develops and optimizes semiconductor packaging technologies, focusing on First Level Interconnects and assembly processes for future platforms. This role involves leading equipment development, managing projects, and collaborating with cross-functional teams to ensure quality, reliability, and manufacturability for high-volume production. | — | 0 |
| ADCE Packaging Design Architect Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record. | — | 0 |
| Advanced Packaging Supplier Technology Development Program Manager The Advanced Packaging Substrate Integration Team is seeking a Program Manager to oversee on-time supplier capacity expansion for advanced heterogeneous packaging technology (EMIB-T). This role involves qualifying new process tools, supplier lines, and factories to meet foundry customer demand. Responsibilities include scoping, planning, CapEx project execution, capability transfer from internal lines to suppliers, and regular management updates. The position requires strong project management, technical risk assessment, problem-solving, and supplier/stakeholder management skills, with extensive interaction with supplier and internal teams, including international travel. | — | 0 |
| FCO Strategic/Development Functional Area Industrial Engineer This role is for an Industrial Engineer focused on factory capacity planning, capital equipment planning, and site space optimization within Intel's manufacturing operations. The role involves analyzing business data, developing data-driven models, forecasting build plans, and collaborating with cross-functional teams to drive manufacturing strategies and operational excellence. While the company mentions "AI everywhere" and "AI product development" in a general context, the core responsibilities of this role are centered on traditional industrial engineering principles for manufacturing and capacity planning, not on building or directly working with AI/ML models or systems. | — | 0 |
| OTF IFA AMHS Equipment Technician This role involves performing electrical and mechanical troubleshooting, repair, and maintenance of manufacturing equipment within Intel's Automated Material Handling System (AMHS) in a cleanroom environment. The technician will also support engineering teams with experiments and data collection, and collaborate during factory ramps. | — | 0 |
| Product Development Engineer Product Development Engineer in the Parametric Test area supporting electric test programs for discrete devices to measure and improve performance and reliability of new process technologies and designs. Responsibilities include defining test content, validating designs, developing test programs, validating results on silicon, and improving testing methods and systems. Also involves defining high volume systems and meeting capacity constraints. | — | 0 |
| Foundry Strategic Industrial Engineer Intel Foundry is seeking a Strategic/Development Industrial Engineer to coordinate data, systems, decision analysis, business processes, and modeling with a focus on capacity and cost. The role involves driving strategies to enhance manufacturing and operational capabilities, forecasting, designing plans aligned with market trends, and empowering stakeholders with data-driven decisions. Responsibilities include developing and maintaining data systems, models, and business processes, providing strategic guidance through data analysis, facilitating business processes, coordinating scenario-based analysis, developing financial models, and defining long-range capacity strategy. | — | 0 |
| Physical Design Engineer- Foundry Services Physical Design Engineer for Intel Foundry Services, focusing on Si Interposer and Bridge designs. Responsibilities include full physical design flow (floor planning, place and route, verification, analysis), optimization for performance/power/area, and methodology development. Requires a Bachelor's or Master's degree in Electrical Engineering or related field with significant experience in EDA tools and physical design aspects. | — | 0 |
| Mixed Signal Design Verification Engineer Mixed Signal Design Verification Engineer responsible for ensuring the quality and functionality of mixed signal components like PCIE, UCIE, and USB4/Type-C PHYs using methodologies like System Verilog, UVM, and Verilog. The role involves developing verification plans, test benches, simulation models, and conducting root cause analysis. Scripting skills in Python, Perl, or Tcl are required, along with familiarity with standard protocols and EDA tools. | — | 0 |
| Power Delivery Engineer This role focuses on designing and developing power delivery solutions for Intel's platforms, ensuring optimal energy efficiency and performance. Responsibilities include defining, analyzing, and implementing power delivery networks, designing power conversion and management solutions, and collaborating with architects. The role requires expertise in power delivery modeling, PCB design tools, and debugging power systems. | — | 0 |
| Packaging Thermal Engineer Seeking a Thermal Engineer with 5+ years of experience in semiconductor packaging thermal analysis, simulation (CFD), and measurement validation. Responsibilities include designing Thermal Test Vehicles (TTVs), architecting product designs with thermal simulation, scouting thermal innovations, and developing compact thermal models. Requires expertise in heat transfer, electronics cooling, CFD tools, and thermal measurement techniques. | — | 0 |
| Mask Manufacturing Technician This role involves performing manufacturing and assembly tasks in a production process, ensuring products meet industry standards and customer specifications. Responsibilities include operating equipment, collecting and evaluating operating data for process optimization, maintaining production efficiency, setting up and operating production equipment, supporting installation and maintenance of equipment, driving utilization of automated systems, producing product that meets output requirements, supporting process improvements, troubleshooting production line issues, and conducting quality checks on raw materials and final products. | — | 0 |
| CPU Core Senior Physical Design Engineer Senior Physical Design Engineer for CPU core development, responsible for the full physical design flow from RTL to GDS, including synthesis, place and route, timing analysis, power analysis, and verification. Collaborates with other engineering teams and EDA vendors to optimize CPU design for power, frequency, and area. | — | 0 |
| Mechanical Project Engineer Mechanical Project Engineer for Intel's Global Construction Engineering organization, responsible for the design and engineering of semiconductor manufacturing facilities. This role involves assessing project feasibility, developing scope, providing technical guidance to supply chain partners, and ensuring cost management for mechanical systems like HVAC, chillers, boilers, and process vacuum systems. The position requires collaboration across disciplines and a focus on safety and innovation within the semiconductor industry. | — | 0 |
| Module Development Engineer This role focuses on the development and optimization of advanced semiconductor manufacturing processes, including material selection, parameter adjustments, equipment metrology, and system design. It involves feasibility studies, process technology development, and collaboration with suppliers to integrate new technologies into manufacturing. The role requires a PhD in a STEM discipline and fundamental knowledge of plasma physics, surface reactions, thin film processes, and semiconductor materials. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer at Intel responsible for the physical design of custom IP and SoC designs, impacting products in Client, Data Center, AI, and Automotive sectors. The role involves the full RTL to GDS flow, optimizing power, performance, and area, and technical leadership for SoC/Subsystem implementation. | — | 0 |
| SOC Design Verification Engineer Intel is seeking a SOC Design Verification Engineer in Bangalore, India, to ensure the functionality, quality, and security of cutting-edge System-on-Chip (SoC) designs. Responsibilities include developing verification plans, test benches, and environments; executing verification plans using emulation and simulation; debugging presilicon issues; collaborating with cross-functional teams; and enhancing verification infrastructure. The role requires proficiency in System Verilog, OVM/UVM, and SoC test environment development, along with strong hardware design knowledge. | — | 0 |
| Senior Post Silicon CPU Debug Engineer Seeking a Senior CPU Debug Engineer to lead logical debugging of Core CPU designs, collaborate with Architecture and Design teams, and provide customer debug support. Responsibilities include analyzing and resolving complex logic issues, developing debugging tools, and improving debug processes. | — | 0 |
| IA Core Post Silicon Validation Engineer Intel is seeking a Post Silicon Validation Engineer for their All Cores Engineering (ACE) Group. This role focuses on core level validation of leading CPU products for Xeon Server products. Responsibilities include developing validation plans, powering on new systems, validating product features, and debugging functional bugs. The role requires expertise in CPU Post-Si debug and validation, test generators, and various validation techniques. | — | 0 |
| Post-silicon Validation and Debug Engineer This role focuses on post-silicon validation and debug engineering for Intel's System-on-Chip (SoC) products, ensuring seamless performance by working at the intersection of hardware, firmware, and software. Responsibilities include performing low-level debug, developing validation plans, implementing debug techniques, conducting root cause analysis, and collaborating with cross-disciplinary teams. | — | 0 |
| Principal Engineer, Hybrid Bonding Module This Principal Engineer role focuses on defining and scaling next-generation advanced packaging technologies, specifically die-to-wafer hybrid bonding (HBI), for high-performance computing, AI, and chiplet architectures. The role involves driving hybrid bonding capability from platform development through high-volume manufacturing, focusing on equipment and process development, yield and reliability improvement, and platform innovation. | — | 0 |
| FCO Functional Area Industrial Engineer This role is for a Factory Capacity Optimization (FCO) Functional Area Industrial Engineer focused on Assembly. The candidate will design, develop, validate, and deploy models to solve complex manufacturing and supply chain problems. Responsibilities include identifying risks and opportunities for toolset roadmaps, defining long-range capacity strategy, forecasting build plans, leveraging data analysis for insights, creating capacity requirements, developing execution plans, monitoring toolset performance, and investigating/designing production capacity models and data systems. The role also involves developing mathematical equipment run rate models and supporting ramp/end-of-life plans. | — | 0 |
| SoC Functional Validation Intern Internship role supporting the functional validation of System on Chip (SoC) devices and systems, involving test content development, data analysis, and validation infrastructure. Requires programming experience in Python, C, or C++ and advanced English. | — | 0 |
| Supply Chain Engineer Supply Chain Engineer role at Intel focused on optimizing semiconductor manufacturing processes, managing supplier quality, and driving cost control and yield improvements. Requires experience in semiconductor factory operations, supply chain engineering, or supplier management, with a strong emphasis on root cause analysis and performance tracking. | — | 0 |